Xilinx ML501 User Manual

Also see for ML501: User guide Quick start Getting Started Tutorial Quick start

Contents

ML501 Reference Design www.xilinx.com 7UG227 (v1.0) June 18, 2007RML501 Reference DesignIntroductionThe Virtex-5 family of FPGAs [Ref 1] offers designers multiple platforms with anoptimized balance of high-performance logic, serial connectivity, signal processing, andembedded processing resources. All members of the Virtex-5 family are built using thesecond generation Advanced Silicon Modular Block (ASMBL™) technology and a state-of-the-art 65 nm copper process to produce the industry's highest performance FPGAs.Along with capabilities offered directly through an integrated IP block implemented insilicon, the Xilinx LogiCORE IP catalog and the embedded processing IP catalog areavailable to system level designers. Constructing embedded processing systems issignificantly simplified by the Base System Builder (BSB) wizard provided as part of theEmbedded Development Kit (EDK).Users can obtain a quick understanding of the features offered by the ML501 boards byrunning the demonstration content provided on the CompactFlash (CF) card includedwith each board. ML501 Getting Started Tutorial [Ref 2] shows how to configure the ML501from the ACE files pre-loaded on the CF card and describes what to observe for expectedoutput.