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Aaeon COM-KB User Manual

Also see for COM-KB: Manual

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Contents
  1. Table Of Contents
  2. Table Of Contents
  3. Table Of Contents
  4. Chapter 1 - Product Specifications
  5. Specifications
  6. Chapter 2 – Hardware Information
  7. Dimensions, Jumpers and Connectors
  8. List of Jumpers
  9. Backlight Selection (SW2)
  10. List of Connectors
  11. SPI BIOS Program connector (CN3)
  12. BIT LVDS Connector (CN6)
  13. LPC Connector (CN7)
  14. ROW_AB connector (CN9)
  15. ROW_CD connector (CN10)
  16. DDR3 SODIMM Connector (DIMM1)
  17. Chapter 3 - AMI BIOS Setup
  18. System Test and Initialization
  19. AMI BIOS Setup
  20. Setup submenu: Main
  21. Setup submenu: Advanced
  22. ACPI Setting
  23. Advanced: CPU Configuration
  24. Advanced: IDE Configuration
  25. Advanced: USB Configuration
  26. Advanced: Dynamic Digital IO
  27. Advanced: Power Management
  28. Power Management: S5 RTC Wake Settings (Fixed Time)
  29. Power Management: S5 RTC Wake Settings (Dynamic Time)
  30. Advanced: On-Module IO Configuration
  31. On-Module IO Configuration: Serial Port 9 Configuration
  32. On-Module IO Configuration: Serial Port 10 Configuration
  33. Advanced: On-Module H/W Monitor
  34. Setup submenu: Chipset
  35. Chipset: North Bridge
  36. North Bridge: GFX Configuration
  37. Chipset: South Bridge
  38. Setup submenu: Boot
  39. Setup submenu: BBS Priorities
  40. Setup submenu: Security
  41. Setup submenu: Save & Exit
  42. Chapter 4 – Drivers Installation
  43. Product CD/DVD
  44. Appendix A - Watchdog Timer Programming
  45. A.1 Watchdog Timer Initial Program
  46. Appendix B - I/O Information
  47. B.1 I/O Address Map
  48. B.2 Memory Address Map
  49. B.3 IRQ Mapping Chart
  50. Appendix C – Programming Digital I/O
  51. C.1 Digital I/O Register
  52. C.2 Digital I/O Sample Program
Aaeon COM-KB User Manual Manual pdf 57 page image
COM Express Module COM-KB3.5.1 Chipset: North BridgeOptions summary:PCIE GEN Speed GEN1Optimal Default, Failsafe DefaultGEN2PCIE GEN speedChapter 3 – AMI BIOS Setup 44
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