MC97F2664April 11, 2014 Ver. 1.4 15111.7.5 Block DiagramTnMS[1:0] TnPOLReloadA MatchTnCCTnENComparator16-bit CounterTnCNTH/TnCNTL16-bit B Data RegisterTnBDRH/TnBDRLClearB MatchBuffer Register BComparator16-bit A Data RegisterTnADRH/TnADRLTnIFRS/WClearA MatchBuffer Register AReloadPulseGeneratorTnO/PWMnOREINT1nTnCNTRTnENClearPOL1n of EIPOL1H/2HFLAG1nS/WClearTo interruptblock22TnMS[1:0]2PrescalerfxMUXfx/4fx/8fx/512fx/2048fx/64fx/2EdgeDetectorTnECEECnfx/1To other blockTnCK[2:0]3To interruptblockTnMIEA MatchTnCCTnENA MatchTnCCTnENFigure 11.29 16-Bit Timer 6/7/8/9 Block Diagram ( where n= 6,7,8, and 9)11.7.6 Register MapTable 11-10 Timer 2 Register MapName Address Dir Default DescriptionTnADRH DDH/E5H/EDH/105BH R/W FFH Timer n A Data High RegisterTnADRL DCH/E4H/ECH/105AH R/W FFH Timer n A Data Low RegisterTnBDRH DFH/E7H/EFH/105DH R/W FFH Timer n B Data High RegisterTnBDRL DEH/E6H/EEH/105CH R/W FFH Timer n B Data Low RegisterTnCRH DBH/E3H/EBH/1059H R/W 00H Timer n Control High RegisterTnCRL DAH/E2H/EAH/1058H R/W 00H Timer n Control Low RegisterTIFLAG1 97H R/W 00H Timer Interrupt Flag 1 Register
