Application Note (AN241)PCI-FRM01 Register Level Application Guide 2005 DAQ system, all rights reserved. http://www.daqsystem.com2. PCI-FRM01 Functional Block DiagramThe address area assigned by the system in the PCI-FRM01 division is shown in the figure below.Most peripheral control and status register is in the I/O area, only SDR SRAM is in the memory area.The configuration area can not be used in the most application because of only using resources for thesystem boot time.PCI TargetPCI BUSLocal BusAddressData(Mem,I/O)Reserved(0x00 ? 0x5F)Reserved(0x70 ? 0xAF)UART(0x60)Camera Link(LVDS)(0xC0)Interrupt controllerDIO(0xD0)Ext. Address, Data, ControlLocal BUSInterruptController(0xb0)INT sources in ChipIO DecoderMEM DecoderTo each IOModulePCI-FRM01 INTERNAL BLOCK - FPGADPRAMFrom Ext.CLOCK syn.MEM DecoderBUS MuxReserved(0xE0 ? 0xFF)PCI-FRM01 of the figure shows the function block, which features the dotted area is reserved forfuture feature additions.