DAQ PCI-FRM01 Application Manual
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Application Note (AN241)PCI-FRM01 Register Level Application Guide 2005 DAQ system, all rights reserved. http://www.daqsystem.com6. Interrupt Controller UsagePCI-FRM01 has interrupt controller to handle the hardware interrupt for each I/O device.When you use these interrupts, eliminating the use of polling overhead of the process can be reduced.INTERRUPTInterrupt Status Register (Read Only)B0hDescriptionI/O AddressOffsetFunctionB4hB8hBChInterrupt Status Clear (Write Only)Interrupt Enable Register (Read/Write)Interrupt Source Indicatior(Read Only)INT_STARegisterINT_SELINT_ENINT_SRCTo control 82C55 ports, first the mode have to set up through the control register. To all setup, mostsignificant bit(MSB) is set to high “1” and write to the control register. If the MSB is “0”, it will becommand of PORTC. (For more information, refer 82C55 manual)When the first time power is applied, all ports will be the input and operation modes will be 0.(1) INT_STA (Interrupt Status)Indicates the current interrupt device that requires. To appear in the status register will have to makethe handle. When the write operation, status bits are cleared.15 01234567891011121314G Status S031ReservedINTERRUPT Status Register Bit Position & meaningS1416Bit Name Description Default Value0 Reserved ‘0’1 Reserved ‘0’2 Reserved ‘0’3 Reserved ‘0’4 Reserved ‘0’5 Reserved ‘0’6 UART Differential RS232C interface ‘0’7 Reserved ‘0’8 Reserved ‘0’9 Reserved ‘0’10 Reserved ‘0’ |
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