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Davicom DM9000 Manual

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Contents
  1. Table Of Contents
  2. Table Of Contents
  3. Features
  4. Pin Configuration
  5. Pin Configuration II: with 32-Bit Data Bus
  6. Pin Description
  7. Processor Interface
  8. Clock Interface
  9. Power Pins
  10. Vendor Control and Status Register Set
  11. Network Control Register (00H)
  12. TX Status Register I (03H)
  13. RX Status Register (06H)
  14. Flow Control Threshold Register (09H)
  15. ROM & PHY Address Register (0CH)
  16. Multicast Address Register (16H~1DH)
  17. Vendor ID Register (28H~29H)
  18. Memory Data Write Command with Address Increment Register (F8H)
  19. EEPROM Format
  20. MII Register Description
  21. Basic Mode Control Register (BMCR) – 00
  22. Basic Mode Status Register (BMSR) – 01
  23. PHY ID Identifier Register #1 (PHYID1) – 02
  24. Auto-negotiation Advertisement Register ANAR) – 04
  25. Auto-negotiation Link Partner Ability Register ANLPAR) – 05
  26. DAVICOM Specified Configuration Register DSCR) – 16
  27. DAVICOM Specified Configuration and Status Register (DSCSR) – 17
  28. Functional Description
  29. Base-TX Operation
  30. B5B Code Group
  31. Base-TX Receiver
  32. Code Group Alignment
  33. Power Reduced Mode
  34. DC and AC Electrical Characteristics
  35. DC Electrical Characteristics
  36. AC Electrical Characteristics & Timing Waveforms
  37. Processor Register Write Timing
  38. External MII Interface Transmit Timing
  39. MII Management Interface Timing
  40. Application Notes
  41. Magnetics Selection Guide
  42. Package Information
  43. Appendix
  44. Order Information
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This manual is suitable for:
DM9000
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