DIMM Type DIMMsPopulated/ChannelOperating Frequency (in MT/s) Maximum DIMM Rank/Channel1.5 V 1.35 V2 1600, 1333, 1066, and 8001066 and 8001333, 1066, and 8001066 and 800Dual rankQuad rankGeneral Memory Module Installation GuidelinesNOTE: Memory configurations that fail to observe these guidelines can prevent your system from booting, hangingduring memory configuration, or operating with reduced memory.This system supports Flexible Memory Configuration, enabling the system to be configured and run in any valid chipsetarchitectural configuration. The following are the recommended guidelines for best performance:• UDIMMs and RDIMMs must not be mixed.• x4 and x8 DRAM based DIMMs can be mixed. For more information, see Mode-Specific Guidelines.• A maximum of two UDIMMs can be populated in a channel.• A maximum of two single- or dual-rank RDIMMs can be populated in a channel.• Populate all sockets with white release tabs first, and then black.• Populate the sockets by highest rank count in the following order - first in sockets with white release levers, andthen black. For example, if you want to mix quad-rank and dual-rank DIMMs, populate quad-rank DIMMs in thesockets with white release tabs and dual-rank DIMMs in the sockets with black release tabs.• Memory modules of different sizes can be mixed provided that other memory population rules are followed (forexample, 2 GB and 4 GB memory modules can be mixed).• Depending on mode-specific guidelines, populate two or three DIMMs per processor (one DIMM per channel)at a time to maximize performance. For more information, see Mode-Specific Guidelines.• If memory modules with different speeds are installed, they will operate at the speed of the slowest installedmemory module(s) or slower depending on system DIMM configuration.Mode-Specific GuidelinesThe allowable configurations depend on the memory mode selected.NOTE: x4 and x8 DRAM based DIMMs can be mixed providing support for RAS features. However, all guidelines forspecific RAS features must be followed. x4 DRAM based DIMMs retain Single Device Data Correction (SDDC) ineither memory optimized (independent channel) or Advanced ECC modes. x8 DRAM based DIMMs requireAdvanced ECC mode to gain SDDC.The following sections provide additional slot population guidelines for each mode.Advanced ECC (Lockstep)Advanced ECC mode extends SDDC from x4 DRAM based DIMMs to both x4 and x8 DRAMs. This protects against singleDRAM chip failures during normal operation.Memory sockets A1 and A4 are disabled and you can populate DIMMs in memory sockets A2, A3, A5, and A6.NOTE: Advanced ECC with Mirroring is not supported.Memory Optimized (Independent Channel) ModeThis mode supports SDDC only for memory modules that use x4 device width and does not impose any specific slotpopulation requirements.45
