37DVD-2910/955TSD0 33 O Audio transmit serial data port 0.SEL_PLL0 I Refer to the description and matrix for SEL_PLL2 pin 32.TSD1 36 O Audio transmit serial data port 1.SEL_PLL1 I Refer to the description and matrix for SEL_PLL2 pin 32.TSD2 37 O Audio transmit serial data output 2.TSD3 38 O Audio transmit serial data output 3.NC 48 — No connect pins. Leave open.MCLK 39 I/O Audio master clock for audio DAC.TBCK 40 O Audio transmit bit clock.SEL_PLL341I Clock source select. Strapped to VCC or ground via 4.7-kΩ resistor; read onlyduring reset.SPDIF_OUT O S/PDIF output.SPDIF_IN 42 I S/PDIF input.RSD 45 I Audio receive serial data.RWS 46 I Audio receive frame sync.RBCK 47 I Audio receive bit clock.XIN 49 I 27-MHz crystal input.XOUT 50 O 27-MHz crystal output.AVEE 51 P Analog power for PLL.AVSS 52 G Analog ground for PLL.DMA[11:0] 53:58, 61:66 O DRAM address bus.DCAS# 69 O DRAM column address strobe.DOE# 70 O DRAM output enable (active-low).DSCK_EN O DRAM clock enable.DWE# 71 O DRAM write enable (active-low).DRAS# 72 O DRAM row address strobe (active-low).DMBS0 73 O DRAM bank select 0.DMBS1 74 O DRAM bank select 1.DB[15:0] 77:82, 85:90, 93:96 I/O DRAM data bus.DCS[1:0]# 97,100 O DRAM chip select (active-low).DQM 101 O Data input/output mask.ES6138F Pin Description (Continued)Name Pin Numbers I/O DefinitionSEL_PLL3 Clock Source0 Crystal oscillator1 DCLK input