IBM NetVista A21 User Manual

Also see for 2254: Hardware Maintenance Manual Hardware Maintenance Manual

Contents

Table 2. I/O address map (continued)Address range (hex) Size (bytes) Description03F7, bit 7 1 bit Diskette disk change channel03F7, bits 6:0 7 bits Primary IDE channel status port03F8 – 03FF 8 COM10400 – 047F 128 Available0480 – 048F 16 DMA channel high page registers0490 – 0CF7 1912 Available0CF8 – 0CFB 4 PCI configuration address register0CFC – 0CFF 4 PCI configuration data registerLPTn + 400h 8 ECP port, LPTn base address + hex 400OCF9 1 Turbo and reset control register0D00 – FFFF 62207 AvailableDMA I/O address mapThe following table lists resource assignments for the DMA address map. Anyaddresses that are not shown are reserved.Table 3. DMA I/O address mapAddress (hex) Description Bits Byte pointer0000 Channel 0, memory address register 00 – 15 Yes0001 Channel 0, transfer count register 00 – 15 Yes0002 Channel 1, memory address register 00 – 15 Yes0003 Channel 1, transfer count register 00 – 15 Yes0004 Channel 2, memory address register 00 – 15 Yes0005 Channel 2, transfer count register 00 – 15 Yes0006 Channel 3, memory address register 00 – 15 Yes0007 Channel 3, transfer count register 00 – 15 Yes0008 Channels 0–3, read status/write command register 00 – 070009 Channels 0–3, write request register 00 – 02000A Channels 0–3, write single mas register bits 00 – 02000B Channels 0–3, mode register (write) 00 – 07000C Channels 0–3, clear byte pointer (write) N/A000D Channels 0–3, master clear (write)/temp (read) 00 – 07000E Channels 0-3, clear mask register (write) 00 – 03000F Channels 0-3, write all mask register bits 00 – 030081 Channel 2, page table address register 00 – 070082 Channel 3, page table address register 00 – 070083 Channel 1, page table address register 00 – 070087 Channel 0, page table address register 00 – 070089 Channel 6, page table address register 00 – 07008A Channel 7, page table address register 00 – 07Appendix C. System address maps 65