SECTION 4 CIRCUIT DESCRIPTION4 - 14-1 RECEIVER CIRCUITS4-1-1 ANTENNA SWITCHING CIRCUITThe antenna switching circuit functions as a low-pass filterwhile receiving. However, its impedance becomes very highwhile D9 and D10 are turned ON. Thus transmit signals areblocked from entering the receiver circuits. The antennaswitching circuit employs a λ⁄4 type diode switching system.Received signals are passed through the low-pass filter (L1,L2, C1–C5). The filtered signals are applied to the λ⁄4 typeantenna switching circuit (D9, D10).The passed signals are then applied to the RF amplifier cir-cuit.4-1-2 RF CIRCUITThe RF circuit amplifies signals within the range of frequen-cy coverage and filters out-of-band signals.The signals from the antenna switching circuit are amplifiedat the RF amplifier (Q15) after passing through the 2 stagestunable bandpass filter (D12, L21, C104, C105, D13, L54,C106, C111, C113). The amplified signals are applied to the1st mixer circuit (Q16) after out-of-band signals are sup-pressed at the 2 stages tunable bandpass filter (D14, C116,C117, D15, L24, C120, C122).Varactor diodes are employed at the bandpass filters thattrack the filters and are controlled by the CPU (IC7) via theD/A convertor (IC9) using T1–T4 signals. These diodes tunethe centre frequency of an RF passband for wide bandwidthreceiving and good image response rejection.4-1-3 1ST MIXER AND 1ST IF CIRCUITSThe 1st mixer circuit converts the received signal into a fixedfrequency of the 1st IF signal with a PLL output frequency.By changing the PLL frequency, only the desired frequencywill pass through a crystal filter at the next stage of the 1stmixer.The signals from the RF circuit are mixed at the 1st mixer(Q16) with a 1st LO signal (114.95–142.95 MHz) comingfrom the VCO circuit to produce a 31.05 MHz 1st IF signal.The 1st IF signal is applied to a crystal filter (FI1) to sup-press out-of-band signals. The filtered 1st IF signal isapplied to the IF amplifier (Q17), then applied to the 2ndmixer circuit (IC3, pin 16).4-1-4 2ND IF AND DEMODULATOR CIRCUITSThe 2nd mixer circuit converts the 1st IF signal into a 2nd IFsignal. A double conversion superheterodyne system (whichconverts receive signals twice) improves the image rejectionratio and obtains stable receiver gain.The 1st IF signal from the IF amplifier is applied to the 2ndmixer section of the FM IF IC (IC3, pin 16), and is mixed withthe 2nd LO signal to be converted into a 450 kHz 2nd IF sig-nal.The FM IF IC contains the 2nd mixer, limiter amplifier, quad-rature detector and active filter circuits. A 2nd LO signal(30.6 MHz) is produced at the PLL circuit by tripling it’s ref-erence frequency.The 2nd IF signal from the 2nd mixer (IC3, pin 3) passesthrough a ceramic filter (FI2) to remove unwanted hetero-dyned frequencies. It is then amplified at the limiter amplifi-er (IC3, pin 5) and applied to the quadrature detector (IC3,pins 10, 11) to demodulate the 2nd IF signal into AF signals.4-1-5 AF CIRCUITAF signals from the FM IF IC (IC3, pin 9) are applied to theanalog switch (IC6, pin 1) after being passed through thehigh-pass filter (IC5B, pins 5, 7) via the “DET” signal. Thesignals pass through the low-pass filter (IC5D, pins 13, 14),and then applied to the analog switch (IC6, pins 9, 10) again.The output signals from the analog swtich (IC6, pin 11) areapplied to the AF power amplifier (IC4, pin 4) after beingpassed through the [VOL] control (SW-A/SW-B unit; R143)via the “VOLIN” and “VOLOUT” signals.2ND IF AND DEMODULATOR CIRCUITSMixer16Limiteramp.2nd IF filter450 kHzPLL ICIC1X115.3 MHzIC3 TA31136F12 1st IF from the IF amplifier (Q17)"RSSI" signal to the CPU pin 59111098 7 5 3AF signal "DET"R5VX2R98C155 C154R100R99R93"SQLIN" signal to theD/A convertor (IC9, pin 23)R92C138 C139C14022 1ActivefilterFI2NoisedetectorFMdetector13"NOIS" signal to the CPU pin 53RSSINoisecomp.×2R94Q18