Icom IC-F24 Service Manual

Also see for IC-F24: Instruction manual Instruction manual Servise manual

Contents

Icom IC-F24 Service Manual Manual pdf 10 page image

4-3 PLL CIRCUITS4-3-1 PLL CIRCUITA PLL circuit provides stable oscillation for the transmit fre-quency and the receive 1st LO frequency. The PLL outputcompares the phase of the divided VCO frequency to thereference frequency. The PLL output frequency is controlledby the divided ratio (N-data) of a programmable divider.The PLL circuit contains the TX/RX VCO circuits (TX:Q13, D17, D18, D21; RX: Q14, D16, D22). The oscillatedsignal is amplified at the buffer amplifiers (Q11, Q12) andthen applied to the PLL IC (IC4, pin 8) after being passedthrough the low-pass filter (L32, C206, C208).The PLL IC (IC4) contains a prescaler, programmablecounter, programmable divider and phase detector, chargepump, etc. The entered signal is divided at the prescaler andprogrammable counter section by the N-data ratio from theCPU. The divided signal is detected on phase at the phasedetector using the reference frequency. The phase detectedsignal is applied to the charge pump to be converted intothe DC voltage, and output from pin 5. After passes throughthe loop filter (C130, C138, C146, C147, R95–R97), the DCvoltage is applied to the TX/RX VCO as the lock voltage.If the oscillated signal drifts, its phase changes from that ofthe reference frequency, causing a lock voltage change tocompensate for the drift in the oscillated frequency.4-3-2 VCO CIRCUITSThe VCO circuit contains a separate RX VCO (Q14, D16,D22) and TX VCO (Q13, D17, D21). The oscillated signalis amplified at the buffer amplifiers (Q10, Q12) and is thenapplied to the T/R switch (D14 for TX, D15 for RX). Then thereceive 1st LO (RX) signal is applied to the 1st mixer circuit(Q3) and the transmit (TX) signal to the pre-drive amplifier(Q9).A portion of the signal from the buffer amplifier (Q12) is fedback to the PLL IC (IC4, pin 8) via the buffer amplifier (Q11)and low-pass filter (L32, C206, C208) as the comparisonsignal.4 - 4Shift registerPrescalerPhasedetectorLoopfilterProgramm-able counterChargepumpProgrammabledividerX215.3 MHz2BufferQ12BufferQ18BufferQ10BufferQ11to transmitter circuitto 1st mixer circuitD14D1515 8Q13, D17, D21TX VCOQ14, D16, D22RX VCOIC4 MB15A02345.9 MHz 2nd LOsignal to the FM IF IC(IC1, pin 2) TriplerQ19"LVIN" signal to the CPU(IC13, pin 64)LPF91011CLOCKDATAPLST• PLL CIRCUITS