4 - 1SECTION 4 CIRCUIT DESCRIPTION4-1 RECEIVER CIRCUITS4-1-1 ANTENNA SWITCHING CIRCUITThe antenna switching circuit functions as a low-pass filterwhile receiving and a resonator circuit while transmitting.This circuit does not allow transmit signals to enter thereceiver circuits.Received signals enter the antenna connector (CHASSIS;J1) and pass through the low-pass filter (L1, L2, L45, C1–C6,C175). The filtered signals are passed through the 1⁄4λ typeantenna switching circuit (D2, D5, L5) and then applied tothe RF circuit.4-1-2 RF CIRCUITThe RF circuit amplifies signals within the range of fre-quency coverage and filters out-of-band signals.The signals from the antenna switching circuit pass throughthe bandpass filter (D3, D4, D7, D8, L7, L8, C21, C23,C24). The filtered signals are amplified at the RF amplifier(Q2) and then passed through the another bandpass filter(D9, D10, C39, C40, C45) to suppress unwanted signals.The filtered signals are applied to the 1st mixer circuit.D3, D4, D7–D10 employ varactor diodes, that are con-trolled by the CPU via the D/A converter (IC8), to trackthe bandpass filter. These varactor diodes tune the centerfrequency of an RF passband for wide bandwidth receivingand good image response rejection.4-1-3 1ST MIXER AND 1ST IF CIRCUITSThe 1st mixer circuit converts the received signal into fixedfrequency of the 1st IF signal with the PLL output fre-quency. By changing the PLL frequency, only the desiredfrequency passes through a crystal filter at the next stageof the 1st mixer.The RF signals from the bandpass filter are mixed with the1st LO signals, where come from the RX VCO circuit viathe BPF (L12, L38, C49, C304, C305), at the 1st mixer cir-cuit (Q3) to produce a 46.35 MHz 1st IF signal. The 1st IFsignal is passed through a monolithic filter (FI1) in order toobtain selection capability and to pass only the desired sig-nal. The filtered signal is applied to the 2nd IF circuit afterbeing amplified at the 1st IF amplifier (Q4).4-1-4 2ND IF AND DEMODULATOR CIRCUITSThe 2nd mixer circuit converts the 1st IF signal into a 2ndIF signal. The double-conversion superheterodyne system(which converts receive signals twice) improves the imagerejection ratio and obtains stable receiver gain.The 1st IF signal from the IF amplifier (Q4) is applied tothe 2nd mixer section of the FM IF IC (IC1, pin 16), andis mixed with the 2nd LO signal to be converted into a450 kHz 2nd IF signal.The FM IF IC (IC1) contains the 2nd mixer, 2nd local oscil-lator, limiter amplifier, quadrature detector, active filter andnoise amplifier circuits. The 2nd LO signal (45.9 MHz) isproduced at the PLL circuit by tripling it’s reference fre-quency (15.3 MHz).The 2nd IF signal from the 2nd mixer (IC1, pin 3) passesthrough the ceramic filter (FI2) to remove unwanted het-erodyned frequencies. It is then amplified at the limiteramplifier section (IC1, pin 5) and applied to the quadraturedetector section (IC1, pins 10, 11) to demodulate the 2ndIF signal into AF signals.The demodulated AF signals are output from pin 9 (IC1) as“DET” signal, and are then applied to the AF circuit.• 2ND IF AND DEMODULATOR CIRCUITSMixer16LimiterAMP2nd IF filter450 kHz X215.3 MHz45.9 MHzIC1 TA31136FN12 1st IF signal from the IF amplifier (Q4)"RSSI" signal to the CPU (IC13, pin 63)111098 7 5AF signal "DET"to the AF circuit"SQLC" signal from theD/A converter IC(IC8, pin 2)To D/A converter IC(IC8, pin 1)R5VX12ActivefilterNoisedetectorFMdetector13"NOIS" signal to the CPU (IC13, pin 53)RSSINoiseAMPNoisecomparator×3Q19FI23