Icom IC-F2610 Service Manual

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Icom IC-F2610 Service Manual Manual pdf 10 page image

4 - 34-2-2 MODULATION CIRCUITThe modulation circuit modulates the VCO oscillating signal(RF signal) using the microphone AF signals.The AF signals from the level controller (IC5) change thereactance of varactor diode (D46) to modulate the oscillatedsignal at the Tx VCO circuit (Q23). The modulated VCO sig-nal is amplified at the buffer amplifiers (Q19, Q20) and isthen applied to the drive amplifier circuit via the T/R switch(D17).The CTCSS/DTCS signals from the CPU (IC20, pin 44) areamplified at the buffer amplifier (Q504). The amplified sig-nals pass through the level controller (IC5, pins 1, 2) and arethen applied to VCO circuit via the low-pass filter (IC21a).When /NWC signal which is applied to N/W switch (Q64) ishigh level, N/W switch (Q64) changes the input level of thelevel controller (IC5), thus narrowing the bandwidth.4-2-3 DRIVE/POWER AMPLIFIER CIRCUITSThe amplifier circuit amplifies the VCO oscillationg signal toan output power level.The signal from the buffer amplifier (Q20) passes throughthe T/R switch (D17), and is amplified at the drive amplifiers(Q17–Q15) and power module (IC11) to obtain 25 W of RFpower.The amplified signal is passed through the antenna switch-ing circuit (D4), low-pass filter and APC detector. Then thesignal is applied to the antenna connector.The collector voltages for driver (Q16) come from the MT8Vregulator (Q38, D28). The transmit mute switch (Q39) con-trols the MT8V regulator when transmit mute is necessary.4-2-4 APC CIRCUITThe APC circuit protects the power module (IC11) from amismatched output load and stabilizes the output power.The APC detector circuit detects forward signals and reflec-tion signals at D3 and D1 respectively. The combined volt-age is at a minimum level when the antenna impedance ismatched at 50 Ω and is increased when it is mismatched.The detected voltage is applied to the inverse amplifier(IC10b, pin 5), and the power setting voltage (PSET) isapplied to the other input (IC10b, pin 6) via the amplifier(IC10a). When antenna impedance is mismatched, thedetected voltage exceeds the power setting voltage. Thenthe output voltage of the inverse amplifier (IC10b, pin 7) con-trols the input current of the power module (IC11) to reducethe output power via the APC driver (Q11).4-3 PLL CIRCUITS4-3-1 PLL CIRCUITA PLL circuit provides stable oscillation of the transmit fre-quency and receive 1st LO frequency. The PLL circuit con-sists of the PLL IC, charge pump, loop filter and referenceoscillator and employs a pulse swallow counter.Oscillated signals from the VCO via the buffer amplifiers(Q19, Q18) are prescaled in the PLL IC (IC12, pin 11) basedon the divided ratio (N-data). The PLL IC detects the out-of-step phase using the reference frequency and outputs itfrom pin 6 (IC12). The output signal is passed through thecharge pump (Q30–Q33) and loop filters (R154/C181,R153/C179), and is then applied to the VCO circuit as thelock voltage.The accelerator switch (IC13) selects the effective loop filterto accelerate the PLL lock up speed.FORREVDriveamp. Poweramp.PSETto antennaconnector• APC CIRCUITIC10a 32+—1IC10b 56+—7Tx signalfrom Q16VCC Q11D3 D1IC11Q15Downloaded from www.Manualslib.com manuals search engine