4 - 1SECTION 4 CIRCUIT DESCRIPTION4-1 RECEIVER CIRCUITS4-1-1 ANTENNA SWITCHING CIRCUITThe antenna switching circuit functions as a low-pass filterwhile receiving and a resonator circuit while transmitting.This circuit does not allow transmit signals to enter thereceiver circuits.Received signals enter the antenna connector (CHASSIS;MP44) and pass through the low-pass filter (L1–L3, C1–C3,C416–C419). The filtered signals are passed through the λ⁄4type antenna switching circuit (D25, L39, D24) and thenapplied to the RF circuit.4-1-2 RF CIRCUITThe RF circuit amplifies signals within the range of frequen-cy coverage and filters out-of-band signals.The signals from the antenna switching circuit pass throughthe two-stage tunable bandpass filters (D21, D20, L38, L37).The filtered signals are amplified at the RF amplifier (Q20)and then passed through the another two-stage tunablebandpass filters (D19, D18, L36, L33) to suppress unwant-ed signals. The filtered signals are applied to the 1st mixercircuit.D18–D21 employ varactor diodes, that are controlled by theCPU via the D/A converter (IC27), to track the bandpass fil-ter. These varactor diodes tune the center frequency of anRF pass band for wide bandwidth receiving and good imageresponse rejection.4-1-3 1ST MIXER AND IST IF CIRCUITSThe 1st mixer circuit converts the received signal into fixedfrequency of the 1st IF signal with the PLL output frequency.By changing the PLL frequency, only the desired frequencypasses through a cristal filter at the next stage of the 1stmixer.The RF signals from the bandpass filter are mixed with the1st LO signals, where come from the RX VCO circuit via theattenuator (R360–R358), at the 1st mixer circuit (Q19) toproduce a 31.65 MHz 1st IF signal. The 1st IF signal ispassed through a monolithic filter (FI1) in order to obtainselection capability and to pass only the desired signals. Thefiltered signal is applied to the 2nd IF circuit after beingamplified at the 1st IF amplifier (Q18).4-1-4 2ND IF AND DEMODULATOR CIRCUITSThe 2nd mixer circuit converts the 1st IF signal into a 2nd IFsignal. The double-conversion superheterodyne system(which convert receive signals twice) improves the imagerejection ratio and obtains stable receiver gain.The 1st IF signal from the IF amplifier (Q18) is applied to the2nd mixer section of the FM IF IC (IC3, pin 16), and is mixedwith the 2nd LO signal to be converted into a 450 kHz 2ndIF signal.The FM IF IC (IC3) contains the 2nd mixer, 2nd local oscil-lator, limiter amplifier, quadrature detector, active filter andnoise amplifier circuits. A 2nd LO signal (31.2 MHz) is pro-duced at the PLL circuit by doubling it’s reference frequency(15.6 MHz).The 2nd IF signal from the 2nd mixer (IC3, pin 3) passesthrough the ceramic filters (FI2, FI3) during narrow channelspacing selection or FI2 only (bypassing FI3) during widechannel spacing selection to remove unwanted heterodynedfrequencies. It is then amplified at the limiter amplifier sec-tion (IC3, pin 5) and applied to the quadrature detector sec-tion (IC3, pins 10, 11) to demodulate the 2nd IF signal intoAF signals.The demodulated AF signals are output from pin 9 (IC3) andapplied to the AF circuit via the receiver mute circuit.• 2nd IF and demodulator circuitsMixer16Limiteramp.2nd IF filter450 kHz X115.6 MHz31.2 MHzIC3 TA31136FN12 1st IF from the IF amplifier (Q18)"RSSI" signal to the CPU (IC14, pin 50)111098 7AF signal "DSIN"R5VX2Squelch levelcontroller (IC13) 2ActivefilterNoisedetectorFMdetector13"NOIS" signal to the CPU (IC14, pin 75)RSSINoisecomp.×2DoublerQ152324FI25FI33