DV-5700/DVF-R9050/R9050-S16CIRCUIT DESCRIPTIONPort No. Port Name I/O Function24 I2CCLK I Clock input for the internal I2C circuit.25 RESETB I Reset. When this input is set low it will reset all internal registersto the default states.67 CLKIN I Master clock input.139 ENHOFF - When this pin is set low the FL12220 will be in normal enhancement mode.Input Signals26,27,30~37 CBIN(0~9) I 10-bit non-multiplexed Cb or multiplexed Cb/ Cr signal input bus.43~48,51~54 CRIN(0~9) I 10-bit non-multiplexed Cr signal input bus.55~58,61~66 YIN(0~9) I 10bit luminance or multiplexed Y/Cb/Cr signal input bus.Input Signals(cont.)38 HBLANKI I Horizontal input blanking signal.39 VBLANKI I Vertical input blanking signal.42 FLDIN I Odd/Even field designator input.Analog Output Signals71 R/Cr-ANA O Analog output.73 G/Y-ANA O Analog output.75 B/Cb-ANA O Analog output.76 COMP - Compensation for video DACs. Should be connected to analogground via a capcitor.77 RSET - Current setting resistor for video DACs.78 VREF - Voltage reference for video DACs.Digital Output Signals83~86,89~9295,96 G/YOUT(0~9) O Green or luminance output bus.115~118123~126,129,130 CBOUT(0~9) O Blue or Cb chrominance output bus.Digital Output Signals(cont.)97,98,103~106109~112 CROUT(0~9) O Red or Cr chrominance output bus.133 HBLANKO O Horizontal output blanking signal.134 VBLANKO O Vertical output blanking signal.137 YCLKO O Output luma sampling clock.138 FLDO I Odd/Even field designator input.140 CCLKO O Output chroma sampling clock.HREFIVREFI Sync & Timing Luma TripleFLDIN Control Large- Edge 10-bitCLKIN Enhancer DACAnalog30 Input YUV /RGBFormatter Interpolator Color-SpaceDigital Luma Converter 30YUV/ YcrCb DetailEnhancer& OutputFormatter DigitalLine YUV YCrCb/Memories RGBSCL I 2 C Control Chroma Decimator OSDSDAInterface Registers Large-EdgeEnhancer (Optional) Engine &Interface ExternalOSD7-2 Simplified Block Diagram