NX-200144-3. VOXIC716 (2/2) amplifies the audio signal captured in the mi-crophone. The signal is then converted into the DC voltage,rectified by D706. The DC voltage activates the ASIC (IC108),and the VOX starts.4-4. Drive and Final AmplifierThe signal from the T/R switch (D100 is on) is amplifiedby the drive amplifier (Q102 and Q103) to 25~27dBm. Theoutput of the drive amplifier is amplified by the RF poweramplifier (Q106) to 5.0W (1W when the power is low). TheRF power amplifier is MOS FET. The output of the RF poweramplifier is then passed through the harmonic filter (LPF)and antenna switch (D104, D105 are on) and applied to theantenna terminal.4-5. APC CircuitThe APC circuit always monitors the current flowingthrough the RF power amplifier (Q106) and keeps a constantcurrent. The voltage drop at R136, R138 and R141 is causedby the current flowing through the RF power amplifier andthis voltage is applied to the differential amplifier (IC100 1/2).IC100 (2/2) compares the output voltage of IC100 (1/2) withthe reference voltage from IC108, and the output of IC100(2/2) controls the VGG of Q102, Q103 and Q106 to makethe both voltages the same. The change of power high/lowis carried out by the change of the reference voltage. Q105,Q107 and Q110 are turned on and Q104 and Q109 areturned off in transmit and the APC circuit is active.Fig. 6 Drive and final amplifier and APC circuitFinalAMPVDDR136VGGIC100(1/2)FromT/R SW(D100)REFVOL(IC108)+BLPFANTSWD104,D105Q106DriveAMPQ102Pre-FinalAMPQ103ANTR138R141IC100(2/2)5. PLL Frequency Synthesizer5-1. VCTCXO (X1)VCTCXO (X1) generates a reference frequency of19.2MHz for the PLL frequency synthesizer. This referencefrequency is applied to pin 9 of the PLL IC (IC3) and is con-nected to the IF circuit as a 2nd local signal through theTripler (Q201). The VCTCXO oscillation frequency is deter-mined by the DC voltage of the VC terminal. The VC voltageis fixed to 1.65V by R59 and R60, and supplied to the VCterminal through IC5. The modulation signal is also fed toVC terminal through IC5.The frequency adjustment is achieved by switching theratio of dividing frequency that is not adjusted by the DCvoltage impressed to VC. The resolution of the adjusting fre-quency is approximately 8Hz. Because twice the VCO out-put are input for the input frequency of PLL IC, the sendingand receiving frequency can be adjusted by approximately4Hz resolution.5-2. VCOThere is a RX VCO and a TX VCO.The TX VCO (Q10) generates a transmit carrier and theRX VCO (Q8) generates a 1st local signal. For the VCO oscil-lation frequency, the transmit carrier is 136 to 174 MHz andthe 1st local receive signal is 194.05 to 232.05MHz.The VCO oscillation frequency is determined by one sys-tem of operation switching terminal “T/R” and two systemsof voltage control terminals “CV” and “ASSIST”.The operation switching terminal, “T/R”, is controlled bythe control line (/T_R) output from the ASIC (IC108). Whenthe /T_R logic is low, the VCO outputs the transmit carrierand when it is high, it outputs a 1st local receive signal.The voltage control terminals, “CV” and “ASSIST”, arecontrolled by the PLL IC (IC3) and ASIC (IC108) and theoutput frequency changes continuously according to theapplied voltage. For the modulation input terminal, “VCO_MOD”, the output frequency changes according to theapplied voltage. This is used to modulate the VCO output.“VCO_MOD” works only when “/T_R” is low.CIRCUIT DESCRIPTION