Kenwood NX-320 Series Service Manual

Also see for NEXEDGE NX-320: Instruction manual Instruction manual Instruction manual Instruction manual Instruction manual

NX-32015When the frequency is controlled by the PLL, the fre-quency convergence time increases as the frequency differ-ence increases when the set frequency is changed. To sup-plement this, the ASIC is used before control by the PLL ICto bring the VCO oscillation frequency close to the desiredfrequency. As a result, the VCO CV voltage does not changeand is always stable at approximately 2.5V.The desired frequency is set for the PLL IC by the ASIC(IC610) through the 3-line “SDO1”, “PCK_RF”, “/PCS_RF”serial bus. Whether the PLL IC is locked or not is monitoredby the ASIC through the “PLD” signal line. If the VCO is notthe desired frequency (unlocked), the “PLD” logic is low.The modulation signal of the Low-speed data is applied topin 23 of the PLL IC (IC403).The modulation signal is digital data of a sampling fre-quency of 96kHz set for the PLL IC by the DSP (IC603)through the “PLLMOD” line.5-4. Local switch (D412, D413)The connection destination of the signal output from thebuffer amplifier (Q408) is changed with the diode switch(D413) that is controlled by the transmission power supply,50T, and the diode switch (D412) that is controlled by thereceive power supply, 50R. If the 50T logic is high, it is con-nected to a send-side pre-drive (Q102). If the 50T logic islow, it is connected to a receive-side mixer (Q201).Fig. 6 PLL block diagramLoopFilterBUFFAMPVCOLPF100CTCXOPLLIC403 Q405Q401,Q402D402~D411D415BUFFAMPQ408SDO1PCK_RF/PCS_RFPLLMODX40116.8MHzT/RSWD412,D41350CSto TX stage50T50Rto 1st MixerIC404 (1/2)IC402CVVCO MODASSIST6. Control CircuitThe control circuit consists of the ASIC (IC610) and its pe-ripheral circuits. IC610 mainly performs the following:1) Switching between transmission and reception by PTTsignal input.2) Reading system, zone, frequency, and program data fromthe memory circuit.3) Sending frequency program data to the PLL.4) Controlling squelch on/off by the DC voltage from thesquelch circuit.5) Controlling the audio mute circuit by decode data input.6-1. ASICThe ASIC (IC610) is a 32-bit RISC processor, equippedwith peripheral function and ADC/DAC.This ASIC operates at 18.432MHz clock and 3.3V/1.5VDC. It controls the flash memory, SRAM, DSP, the receivecircuit, the transmitter circuit, the control circuit, and the dis-play circuit and transfers data to or from an external device.6-2. Memory circuitThe memory circuit consists of the ASIC (IC610), theSRAM (IC605), and the flash memory (IC601). The flashmemory has a capacity of 32M-bit that contains the trans-ceiver control program for the ASIC and stores the data. Italso stores the data for transceiver channels and operatingparameters that are written by the FPU. This program canbe easily written from external devices. The SRAM has acapacity of 1M-bit that contains work area and data area.■ Flash memoryNote: The flash memory stores the data that is written bythe FPU (KPG-141D), tuning data (Deviation, Squelch, etc.),and firmware program (User mode, Test mode, Tuningmode, etc.).■ SRAM (Static memory)Note: The SRAM has a temporary data area and work area.CIRCUIT DESCRIPTION