Kenwood NX-800 Service Manual

Also see for NEXEDGE NX-800 series: Brochure Function reference Instruction manual Instruction manual Specifications

NX-80021CIRCUIT DESCRIPTION5. PLL Frequency Synthesizer5-1. VCTCXO (X1)VCTCXO (X1) generates a reference frequency of19.2MHz for the PLL frequency synthesizer. This referencefrequency is applied to pin 9 of the PLL IC (IC3) andconnected to IF circuit as a 2nd local signal through Tripler.The VCTCXO oscillation frequency is determined by DCvoltage of VC terminal. The VC voltage is fixed to 1.65V by R1and R2, and supplied to VC terminal through IC2. Modulationsignal is also fed to VC terminal through IC2.The frequency adjustment is achieved by switching theratio of dividing frequency that is not adjusted by the DCvoltage impressed to VC. The resolution of adjusting fre-quency is approximately 4Hz.5-2. VCOThere is a RX VCO and a TX VCO.The TX VCO (Q6) generates a transmit carrier and the RXVCO (Q5) generates a 1st local signal. For the VCO oscillationfrequency, the transmit carrier is 450 to 520 MHz and the 1stlocal signal is 391.95 to 461.95MHz.The VCO oscillation frequency is determined by one sys-tem of operation switching terminal "T/R" and two systems ofvoltage control terminals "C/V" and "V-assist".The operation switching terminal, "T/R", is controlled bythe control line (/T_R) output from the CPU (IC510). Whenthe /T_R logic is low, the VCO outputs the transmit carrierand when it is high, it outputs a 1st local receive signal.The voltage control terminals, "CV" and "V-assist", arecontrolled by the PLL IC (IC3) and CPU (IC510) and the outputfrequency changes continuously according to the appliedvoltage. For the modulation input terminal, "VCO MOD", theoutput frequency changes according to the applied voltage.This is used to modulate the VCO output. "VCO MOD" worksonly when "/T_R" is low.5-3. PLL IC (IC3)PLL IC compares the differences in phases of the VCOoscillation frequency and the VCTCXO reference frequency,returns the difference to the VCO CV terminal and realizesthe "Phase Locked Loop" for the return control. This allowsthe VCO oscillation frequency to accurately match (lock) thedesired frequency.When the frequency is controlled by the PLL, thefrequency convergence time increases as the frequencydifference increases when the set frequency is changed. Tosupplement this, the CPU is used before control by the PLLIC to bring the VCO oscillation frequency close to the desiredfrequency. As a result, the VCO CV voltage does not changeand is always stable at approx. 3.0V.The desired frequency is set for the PLL IC by the CPU(IC510) through the 3-line "SDO1", "SCK1", "PCS_RF" serialbus. Whether the PLL IC is locked or not is monitored by theCPU through the “PLD” signal line. If the VCO is not thedesired frequency (unlock), the "PLD" logic is low.5-4. Local Switch (D101, D205)The connection destination of the signal output from thebuffer amplifier (Q10) is changed with the diode switch(D101) that is controlled by the transmission power supply,80T, and the diode switch (D205) that is controlled by thereceive power supply, 50R. If the 80T logic is high, it is con-nected to a send-side pre-drive (Q101). If the 80T logic islow, it is connected to a local amplifier (Q208).LoopFilterBUFFAMPBUFFAMPRippleFilterVCO150CVCTCXOPLLIC3 Q9Q5,Q6D3,D4D7~D12D14BUFFAMPQ10LPFQ3SDO1SCK1/PCS RFX119.2MHzT/RSWD101,D20550C50Cto TX stage80T50Rto Local AmplifierIC5Q1IC4CVVCO MODASSISTFig. 7