Kenwood TK-2200 Service Manual

Also see for TK-2200: Instruction manual Specifications Brochure Instruction manual

Contents

TK-22009CIRCUIT DESCRIPTION6) SquelchPart of the AF signal from the IC enters the FM IC (IC201)again, and the noise component is amplified and rectifiedby a filter and an amplifier to produce a DC voltagecorresponding to the noise level.The DC signal from the FM IC goes to the analog port ofthe microprocessor (IC405). IC405 determines whetherto output sounds from the speaker by checking whetherthe input voltage is higher or lower than the preset value.To output sounds from the speaker, IC405 sends a highsignal to the SP MUTE line and turns IC302 on throughQ303,Q304,Q305,Q306 and Q316. (See Fig. 4)7) Receive Signalling(1) QT/DQTThe output signal from FM IC(IC201) enters themicroprocessor(IC405) through IC301. IC405 determineswhether the QT or DQT matches the preset value, andcontrols the SP MUTE and the speaker output soundsaccording to the squelch results.(2) MSK (Fleet Sync)The MSK input signal from the FM IC goes to pin 31 of IC 301.The signal is demodulated by MSK demodulator in IC 301.The demodulated data goes to the CPU for processing.3) Unlock DetectorIf a pulse signal appears at the LD pin of IC1, an unlockcondition occurs, and the DC voltage obtained from C4,R5and D1 causes the voltage applied to the microprocessorto go low. When the microprocessor detects this condition,the transmitter is disabled, ignoring the push-to-talk switchinput signal.4. Transmitter System1) Microphone AmplifierThe signal from the microphone passes through the IC301.When encoding DTMF, it is turned OFF for muting themicrophone input signal by IC301.The signal passes through the Audio processor (IC301) forthe maximum deviation adjustment, and goes to the VCOmodulation input.RECEIVE SIGNALLINGRECEIVE SIGNALLINGSPQ306,316SWIF AmpFM IF IC201 IC301IC302AF PAIC405Q303,304,305SWQT/DQTDTMFCLK,DATA,STD,LOADNSIGNALCPUAQUAAF CONTQT/DQT INBUSYFig. 4 AF amplifier and squelch(3) DTMFThe DTMF input signal from the FM IC (IC201) goes toIC301. The decoded information is then processed by theCPU.3. PLL Frequency SynthesizerThe PLL circuit generates the first local oscillator signal forreception and the RF signal for transmission.1) PLLThe frequency step of the PLL circuit is 2.5, 5, 6.25 or 7.5kHz.A 12.8MHz reference oscillator signal is divided at IC1 by afixed counter to produce an oscillator (VCO) output signalwhich is buffer amplified by Q2 then divided in IC1 by aprogrammable counter. The divided signal is compared inphase with the 5 or 6.25kHz reference signal from the phasecomparator in IC1. The output signal from the phasecomparator is filtered through a low-pass filter and passedto the VCO to control the oscillator frequency. (See Fig. 5)2) VCOThe operating frequency is generated by Q4 in transmitmode and Q3 in receive mode. The oscillator frequency iscontrolled by applying the VCO control voltage, obtainedfrom the phase comparator, to the varactor diodes (D4 andD7 in transmit mode and D5 and D9 in receive mode). TheRX pin is set high in receive mode causing Q5 turn on.The TX pin is set high in transmit mode. The outputs fromQ3 and Q4 are amplified by Q6 and sent to the RF amplifiers.PLL DATAX112.8MHzREF OSC1M1NPLL IC IC1PHASECOMPARATORCHARGEPUMPLPF5kHz/6.25kHzD4, 7D5, 9Q4TX VCOQ3RX VCOQ6BUFF AMP IC21/ 2Q2BUFFERQ5, 7T/R SW5kHz/6.25kHzLPFRXTXFig. 5 PLL circuit