TK-7102H15■ Wide/Narrow Changeover CircuitThe Wide port (pin 65) and Narrow port (pin 64) of the CPUis used to switch between ceramic filters. When the Wideport is high, the ceramic filter SW diodes (D303, D302) causeCF301 to turn on to receive a Wide signal.When the Narrow port is high, the ceramic filter SW di-odes (D303, D302) cause CF302 to turn on to receive a Nar-row signal.■ AF Signal SystemThe detection signal from IF IC (IC301) goes to D/A con-verter (IC161) to adjust the gain and is output to AF filter(IC251) for characterizing the signal. The AF signal outputfrom IC251 and the DTMF signal, BEEP signal are summedand the resulting signal goes to the D/A converter (IC161).The AFO output level is adjusted by the D/A converter. Thesignal output from the D/A converter is input to the audiopower amplifier (IC252). The AF signal from IC252 switchesbetween the internal speaker and speaker jack (J1) output.■ Squelch CircuitThe detection output from the FM IF IC (IC301) passesthrough a noise amplifier (Q301) to detect noise. A voltage isapplied to the CPU (IC101). The CPU controls squelch ac-cording to the voltage (SQIN) level. The signal from the RSSIpin of IC301 is monitored. The electric field strength of thereceive signal can be known before the SQIN voltage is inputto the CPU, and the scan stop speed is improved.NarrowIC101 64pinIF_IN MIX_OIC301IF SystemCF302(Narrow)CF301(Wide)R320R319R317R318D303 D302WideIC6 65pinAFFilterD/ACONV.D/ACONV.IC161 IC251 IC161W/NO(EVOL2) AF PAIC252 SPIF ICIC301Q301NOISE AMP D301IC301 IC101AFORSSIDETCPUIFSYSTEMSQINRSSIFig. 3 Wide/Narrow changeover circuitFig. 4 AF signal systemFig. 5 Squelch circuitPLL Frequency SynthesizerThe PLL circuit generates the first local oscillator signal forreception and the RF signal for transmission.■ PLLThe frequency step of the PLL circuit is 5 or 6.25kHz. A16.8MHz reference oscillator signal is divided at IC401 by afixed counter to produce the 5 or 6.25kHz reference fre-quency. The voltage controlled oscillator (VCO) output signalis buffer amplified by Q410, then divided in IC401 by a dual-module programmable counter. The divided signal is com-pared in phase with the 5 or 6.25kHz reference signal in thephase comparator in IC401. The output signal from thephase comparator is filtered through a low-pass filter andpassed to the VCO to control the oscillator frequency. (SeeFig. 6)■ VCOThe operating frequency is generated by Q406 in transmitmode and Q405 in receive mode. The oscillator frequency iscontrolled by applying the VCO control voltage, obtainedfrom the phase comparator, to the varactor diodes (D405 andD406 in transmit mode and D403 and D404 in receive mode).The TX/RX pin is set low in receive mode causing Q408 andQ407 to turn Q406 off, and turn Q405 on. The TX/RX pin isset high in transmit mode. The outputs from Q405 and Q406are amplified by Q410 and sent to the RF amplifiers.D405,406Q406TX VCOQ410BUFFAMPD403,404Q405RX VCOQ407,408T/R SWChargepumpLPFPhasecomparator1/M1/N 5kHz/6.25kHz5kHz/6.25kHzREFOSC16.8MHzPLLDATAIC401 : PLL ICQ404AMPFig. 6 PLL circuitCIRCUIT DESCRIPTION