Kenwood TK-8180 Service Manual

Also see for TK-8180: Modification Information Function reference Brochure & specs Specification Instruction manual

TK-8180184. Frequency Synthesizer Unit4-1. Frequency SynthesizerThe frequency synthesizer consists of the TCXO (X301),VCO, PLL IC (IC301) and buffer amplifiers.The TCXO generates 16.8MHz. The frequency stability is2.5ppm within the temperature range of –30 to +60°C. Thefrequency tuning and modulation of the TCXO are done toapply a voltage to pin 1 of the TCXO. The output of the TCXOis applied to pin 8 of the PLL IC.The VCO consists of 2VCO and covers a dual range of the405.15~475.15MHz and the 450~520MHz. The VCO gener-ates 405.15~475.15MHz for providing to the first local signalin receive. The operating frequency is generated by Q307 intransmit mode and Q306 in receive mode. The oscillator fre-quency is controlled by applying the VCO control voltage, ob-tained from the phase comparator (IC301) to the variable ca-pacitor diodes (D308 and D311 in transmit mode and D309and D313 in receive mode).The T/R pin of IC404 goes “high” in receive mode causingQ307 and Q309 to turn off, and Q306, Q308 and Q310 turnon. The T/R pin goes “low” in transmit mode.The outputs from Q306 and Q307 are amplified by bufferamplifier (Q311) and doubled by Q301 and then sent to PLLIC.The PLL IC consists of a prescaler, reference divider,phase comparator, charge pump (The frequency step of thePLL circuit is 20 or 25kHz). The input signal from the pins 8and 5 of the PLL IC is divided down to the 20 or 25kHz andcompared at phase comparator. The phase comparator out-put signal is fed into a low-pass filter (Q302 and Q303) beforebeing applied to the VCO as a frequency control voltage. Thislow-pass filter’s power is supplied by the DC/DC converter(IC251 and Q251). The DC signal is applied to the CV of theVCO and locked to keep the VCO frequency constant.PLL data is output from DT (pin 112), PCK (pin 82) and PLE(pin 81) of the microprocessor (IC404). The data are input tothe PLL IC when the channel is changed or when transmis-sion is changed to reception and vice versa. A PLL lock con-dition is always monitored by the pin 80 (UL) of the micropro-cessor. When the PLL is unlocked, the UL goes low.5. Control CircuitThe block diagram of the control circuit is shown in Figure5.The CPU (IC404) is a 16-bit microcomputer that contains a256k-byte Mask ROM and a 20k-byte RAM. This CPU is con-nected with an external 512k-byte Flash ROM (IC405) andoperates in memory expansion mode.The Firmware Program is stored in the Flash ROM and theuser data and adjustment data are stored in the EEPROM(IC401). The CPU and Flash ROM are connected with an 8 bitbus and the EEPROM and RTC IC (IC402) are connected witha I2C bus (*1). The RTC IC (IC402) has a clock function and iscontrolled by the CPU (IC404).Serial communication with a PC is performed through twopaths: through the 232C Level converter IC (IC416) andthrough the Display Unit Panel CPU (IC902). The 8 bit ShiftRegister (IC403) is used as an 8-port Extended Output Port.IC410 is an 8 bit-8ch D/A converter. The channels are set asfollows:Ch1 : Modulation balanceCh2 : Deviation FactorCh3 : Max Power LevelCh4 : Reception tuning circuitCh5 : Deviation FactorCh6 : Speaker volumeCh7 : VCXO control voltageCh8 : DEO output level*1: I2C bus is a registered trademark of PHILIPS of the Neth-erlands.LPFBPFBUFFVCOPLLCPU20155Doublerx2CVQ313BUFFQ311TCXOX301SWD316SW D315TodriveampQ301To mixer8FCBALIC408MBT/RT/R(TX : Low)IC301ULIC404DT,PCK,PLEQ302Q303CIRCUIT DESCRIPTIONFig. 4 PLL block diagramIC405FlashROMIC4038bit ShiftregisterIC410D/AconverterIC416232CLevelconverterIC902CPUIC903LCDdriverIC401EEPROMIC402RTC ICDisplay unitIC415AQUA-LIC413Multi-plexerSignal blockIC301PLL ICRF blockMaskROMIC404CPUFig. 5 Control circuit block diagram