TM-2550A/E,2530ACIRCUIT DESECRIPTIONThenegativefeedbackcircuitsamplesthetransmittedsignal, rectifiesthissignalwithD4,andappliestherectifiedsignaltoNFGAINamplifierQ6:2SC2458(Y).Thisamp-lifiersuppliesasignaltoDifferentialAmplifiersQ4andQ5:2SC2458(Y) whichcontrolthebiasappliedtothePAmodulepin2,anddrivertransistorQ12of thePLLunit,viabiasregulatorsQ2:2SD1406(Y)andO3:2SA1015(Y).||ifHigh/Low power swithing is accomplished by applying aground to pin number 1 of connector (2) on the FINALunit.ThiscausesVR3toactasavoltagedividerthat cont-rolsthecondutionofNFGAINamplifierQ6.LReflectedpoweriscoupledthruD5on theFINALunitandisusedtocontroltheconductionofQ7.ThistransistorfunctionlikeQ6tocontroldifferentialamplifersQ4andO5,andthusthebiasappliedtothePowerAmplifier.Item Symbol | Tc(°C) Condition RatingOperating Vee 25 17VDC current Iec 25 7AOperating case temp. | Tc (op) —30~ + 110°CStorage temp. Tstg —40~ + 110°CPower input Pin 25 Zg = Zi = 502 0.4WPower output Po 25 Zg = ZI = 502 40WTable4M57737Max.rating(TM-2530AFinalunit01)likLo Le@IinPpuT @Vcci @Vcc2 @MouT @GnodFig.4 M57737 Equivalent circuitItem Symbol | Te (°C) RatingOperating voltage Vee 25 17V.DC current icc 25 14AOperating case temp. | Tc (op) —30~ + 110°CStorage temp. Tstg —40~ + 110°CTable5 M57726 Max. rating (TM-2550A/E Final unit Q1)ValueItem Symbol | Tc (°C) ConditionMin. Typ.Vcc = 12.5V.F = 144~148MHz,PIN =O0.4W,ZL = ZG = 502Power output Po 25 43W 47WVee = 12.5V,F = 144~148MHz,PIN = 0.4W,ZL = ZG = 502Total efficiency nT 25 50% 54%Table 6 ™M57726 Electrical characteristicH1,@in @vcci1 @Vcc2 Mout OnoFig.5 M57726 Equivalent circuitPLL CIRCUITThe PLL circuit is divided into two main loops : transmitand receive.Receive PLL LoopThe signal generated by the RX VCO (Voltage ControlledOscillator) Qi6 : 2SK192A(GR)*P is applied to bufferamplifier Q17 : 2SC2668(Y) and mixed with the HET(Heterodyne) signal by Q21 : 2SC2668(Y) where it be-comes the PLL IF signal (K,M 13.015 to 15.010MHz,T,W12.865 to 19.86MHz). This PLL IF signal is then amplifiedby 020 : 2SC2668(Y} and applied to the Phase Detector{C2 : MC145155P*K where it is divided to obtain a 5kHzsignal. The divide ratio is determined by Serial Data fromthe CONTROL unit. This 5kHz signal is compared with the5kHz reference signal obtained by dividing the 10.240 MHzReference signal.The Phase Detector compares the phase of these two signalsand transmits an error control signal to the VCO. The cont-rol signal is filtered by an Active Low Pass filter composedof 013 : 2SK30A(O) and Q14: 2SC2458(Y) to removeany AC fluctuations to obtain a DC correction voltage. Thecorrection voltage is used to change the capacitance ofVaractor Diode D5 : 1SV50, which varies the output of theRX VCO to lock it on frequency.If the phase difference is too great to be corrected by thecontrol voltage applied to D5, an unlock signal is generatedby the Phase Detector. This signal turns OFF Q15 :2SC2458(Y) which turns OFF output amplifier O18 :2SC2668(Y) to prevent operation outside the authorizedlimits.The PLL HET Oscillator, Q19 : 2SC2668(Y) oscillates at39.48MHz. This signal is applied to frequency tripler Q22 :2SC2688(Y) to obtain a signal of 118.44MHz which isapplied to mixer Q21.