4.5. The maximum allowable conditions at the inputsand outputs of signal lines.Under the maximum permissible conditions are meant such currents and voltages that do notlead to failure or irreversible degradation of the characteristics of the E-502. At the same time, themaximum permissible conditions may not provide the performance characteristics of the product.! Long-term operation of equipment at maximum permissible levels is not allowedTable 4-3 Maximum permissible E-502 input/output conditionsCircuit/ Signal Maximum permissible modes descriptionInputs X1÷X16, Y1÷Y16, GND32 ±15 V relative to AGNDOutputs DAC1, DAC2 ± 20 mA when the total load power is not exceeded, seesection 4.8Outputs +15 V, -15 V No more than 30 mA in load circuits when the total loadpower is not exceeded, see section 4.8SC is not permitted.Inputs DI_SYN1 ± 10 V relative to the DGND circuit with an internal inputresistance of, at least, 1 kΩ.Digital inputs DI1÷ DI13, DI_SYN2 From -0.4 to +6.5 V relative to the DGND circuitDigital inputs of dual purpose DI14 /DI_SYN2, DI15 / СONV_IN, DI16 /START_INFrom -0.4 to +3.6 V relative to DGND circuitDO digital outputs From -0.4 to +3.6 V relative to the DGND circuit, thecurrent is not more than ± 20 mA. When the power is on, thetotal load power should not exceed the calculated value,according to section 4 .8 .TX, RX signals on the internal UART0connectorFrom -0.2 to + (Vcc + 0.2) V relative to the GND circuit,where Vcc is the E-502 internal voltage of 3.3V.The load current is not more than ± 8 mA.Table 4-4 Maximum permissible through currents by common wires circuits:Maximum permissible through-current by thecircuits of one E-502 module:AGND-DGND5100 mAMaximum permissible through-currents by circuitsGND, 0 V, GND_USB, CHASSIS(on any contour into which covers these circuits) 100 mAThe maximum permissible voltage rise ratebetween galvanically isolated circuits in E-50210 kV / μsThe maximum permissible circuit modes of JTAG connectors are not considered, since thescope of application of JTAG is limited to the standard types of JTAG emulators and thespecified connection procedure, according to i. 4.4.3, p. 39.5 The notion of circuits GND, AGND, DGND is introduced in section 4.1