Lauterbach MMDSP Processor Architecture Manual

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Lauterbach MMDSP Processor Architecture Manual Manual pdf 11 page image

MMDSP Debugger 11©1989-2019 Lauterbach GmbHExample for BreakpointsAssume you have a target with FLASH from 0 to 0xFFFFF and RAM from 0x100000 to 0x11FFFF. Thecommand to configure TRACE32 correctly for this configuration is:The following breakpoint combinations are possible.Software breakpoints:On-chip breakpoints:Downloading Program Code to the Video CoreThe STN8810A and STN8810V are not object code compatible. When loading a program that was compiledfor the wrong core, the message “file not compiled for this processor” is displayed.The Video Core employs a compression algorithm based on a dictionary. The dictionary is dynamicallycreated while downloading the object code to the target. The algorithm exploits the fact that someinstructions do not use all fields of the opcode to obtain better compression. While the functionality of aninstruction is not affected by compression/decompression, a reconstructed opcode will not be necessarilybinary identical to the original opcode. Therefore the /verify option for the data.load command mayproduce false error message when used for download code to the video core.Changing the FLAG RegisterChanging the FLAG register through the debugger is not supported.Map.BOnchip 0x0--0x0FFFFFBreak.Set 0x100000 /Program ; Software Breakpoint 1Break.Set 0x101000 /Program ; Software Breakpoint 2Break.Set 0xx /Program ; Software Breakpoint 3Break.Set 0x100 /Program ; On-chip Breakpoint 1Break.Set 0x0ff00 /Program ; sOn-chip Breakpoint 2