CHAPTER 19 STANDBY FUNCTIONUser’s Manual U16899EJ2V0UD38019.2 Standby Function Operation19.2.1 HALT mode(1) HALT modeThe HALT mode is set by executing the HALT instruction. HALT mode can be set regardless of whether the CPUclock before the setting was the high-speed system clock, Ring-OSC clock, or subsystem clock.The operating statuses in the HALT mode are shown below.Table 19-2. Operating Statuses in HALT Mode (1/2)When HALT Instruction Is Executed While CPU IsOperating on High-Speed System ClockWhen HALT Instruction Is Executed While CPU IsOperating on Ring-OSC ClockWhen Ring-OSCOscillation ContinuesWhen Ring-OSCOscillation StoppedNote 1When High-Speed SystemClock Oscillation ContinuesWhen High-Speed SystemClock Oscillation StoppedHALT Mode SettingItemWhenSubsystemClock UsedWhenSubsystemClock NotUsedWhenSubsystemClock UsedWhenSubsystemClock NotUsedWhenSubsystemClock UsedWhenSubsystemClock NotUsedWhenSubsystemClock UsedWhenSubsystemClock NotUsedSystem clock Clock supply to the CPU is stoppedCPU Operation stoppedPort (latch) Status before HALT mode was set is retained16-bit timer/event counter 00 Operable Operation not guaranteed16-bit timer/event counter 01Note 2Operable Operation not guaranteed8-bit timer/event counter 50 Operable Operation not guaranteed when count clock other thanTI50 is selected8-bit timer/event counter 51 Operable Operation not guaranteed when count clock other thanTI51 is selected8-bit timer H0 Operable Operation not guaranteed when count clock other thanTM50 output is selected during 8-bit timer/event counter50 operation8-bit timer H1 Operable Operation not guaranteed when count clock other thanf R/27is selectedWatch timer Operable OperableNote 3Operable OperableNote 3OperableNote 4Operation notguaranteedOperableNote 4Operation notguaranteedRing-OSC cannotbe stoppedNote 5Operable − OperableWatchdogtimerRing-OSC can bestoppedNote 5Operation stoppedA/D converter Operable Operation not guaranteedUART0 OperableUART6 OperableOperation not guaranteed when serial clock other thanTM50 output is selected during TM50 operationCSI10 Operable Operation not guaranteed when serial clock other thanexternal SCK10 is selectedSerialinterfaceCSI11Note 2Operable Operation not guaranteed when serial clock other thanexternal SCK11 is selectedClock monitor Operable Operation stopped Operable Operation stoppedMultiplier/divider Operable Operation not guaranteedPower-on-clear function OperableLow-voltage detection function OperableExternal interrupt OperableNotes 1. When “Stopped by software” is selected for Ring-OSC by the option byte and Ring-OSC is stopped bysoftware (for option bytes, see CHAPTER 24 OPTION BYTE).2.μPD78F0133H, 78F0134H, 78F0136H, 78F0138H, and 78F0138HD only.3. Operable when the high-speed system clock is selected.4. Operation not guaranteed when other than subsystem clock is selected.5. “Ring-OSC cannot be stopped” or “Ring-OSC can be stopped by software” can be selected by the optionbyte.
