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NEC MuPD78F0132H User Manual

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Contents
  1. Table Of Contents
  2. Table Of Contents
  3. Table Of Contents
  4. Table Of Contents
  5. Table Of Contents
  6. Table Of Contents
  7. Table Of Contents
  8. CHAPTER 1 OUTLINE
  9. Applications
  10. Ordering Information
  11. Pin Configuration (Top View)
  12. Kx1 Series Lineup
  13. V850ES/Kx1, V850ES/Kx1+ product lineup
  14. Block Diagram
  15. Outline of Functions
  16. CHAPTER 2 PIN FUNCTIONS
  17. Description of Pin Functions
  18. AV REF
  19. Pin I/O Circuits and Recommended Connection of Unused Pins
  20. CHAPTER 3 CPU ARCHITECTURE
  21. Internal program memory space
  22. Internal data memory space
  23. Special function register (SFR) area
  24. Processor Registers
  25. General-purpose registers
  26. Special function registers (SFRs)
  27. Instruction Address Addressing
  28. Immediate addressing
  29. Table indirect addressing
  30. Operand Address Addressing
  31. Register addressing
  32. Direct addressing
  33. Short direct addressing
  34. Special function register (SFR) addressing
  35. Register indirect addressing
  36. Based addressing
  37. Based indexed addressing
  38. Stack addressing
  39. Port Functions
  40. Port Configuration
  41. Port 0
  42. Port 1
  43. Port 2
  44. Port 3
  45. Port 4
  46. Port 5
  47. Port 6
  48. Port 7
  49. Port 12
  50. Port 13
  51. Port 14
  52. Registers Controlling Port Function
  53. Port Function Operations
  54. Functions of Clock Generator
  55. Registers Controlling Clock Generator
  56. System Clock Oscillator
  57. When subsystem clock is not used
  58. Clock Generator Operation
  59. Time Required to Switch Between Ring-OSC Clock and High-Speed System Clock
  60. Time Required for CPU Clock Switchover
  61. Clock Switching Flowchart and Register Setting
  62. Switching from high-speed system clock to Ring-OSC clock
  63. Switching from high-speed system clock to subsystem clock
  64. Switching from subsystem clock to high-speed system clock
  65. Register settings
  66. CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01
  67. Configuration of 16-Bit Timer/Event Counters 00 and 01
  68. Registers Controlling 16-Bit Timer/Event Counters 00 and 01
  69. Operation of 16-Bit Timer/Event Counters 00 and 01
  70. PPG output operations
  71. Pulse width measurement operations
  72. External event counter operation
  73. Square-wave output operation
  74. One-shot pulse output operation
  75. Cautions for 16-Bit Timer/Event Counters 00 and 01
  76. CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51
  77. Configuration of 8-Bit Timer/Event Counters 50 and 51
  78. Registers Controlling 8-Bit Timer/Event Counters 50 and 51
  79. Operations of 8-Bit Timer/Event Counters 50 and 51
  80. Operation as external event counter
  81. PWM output operation
  82. Cautions for 8-Bit Timer/Event Counters 50 and 51
  83. CHAPTER 8 8-BIT TIMERS H0 AND H1
  84. Registers Controlling 8-Bit Timers H0 and H1
  85. Operation of 8-Bit Timers H0 and H1
  86. Operation as PWM output mode
  87. Carrier generator mode operation (8-bit timer H1 only)
  88. CHAPTER 9 WATCH TIMER
  89. Configuration of Watch Timer
  90. Watch Timer Operations
  91. Interval timer operation
  92. Cautions for Watch Timer
  93. CHAPTER 10 WATCHDOG TIMER
  94. Configuration of Watchdog Timer
  95. Registers Controlling Watchdog Timer
  96. Operation of Watchdog Timer
  97. Watchdog timer operation when "Ring-OSC can be stopped by software" is selected by option byte
  98. Watchdog timer operation in STOP mode (when "Ring-OSC can be stopped by software" is selected by option byte)
  99. Watchdog timer operation in HALT mode (when "Ring-OSC can be stopped by software" is selected by option byte)
  100. CHAPTER 11 CLOCK OUTPUT/BUZZER OUTPUT CONTROLLER
  101. Configuration of Clock Output/Buzzer Output Controller
  102. Clock Output/Buzzer Output Controller Operations
  103. CHAPTER 12 A/D CONVERTER
  104. Configuration of A/D Converter
  105. Registers Used in A/D Converter
  106. A/D Converter Operations
  107. Input voltage and conversion results
  108. A/D converter operation mode
  109. How to Read A/D Converter Characteristics Table
  110. Cautions for A/D Converter
  111. CHAPTER 13 SERIAL INTERFACE UART0
  112. Configuration of Serial Interface UART0
  113. Registers Controlling Serial Interface UART0
  114. Operation of Serial Interface UART0
  115. Asynchronous serial interface (UART) mode
  116. Dedicated baud rate generator
  117. CHAPTER 14 SERIAL INTERFACE UART6
  118. Configuration of Serial Interface UART6
  119. Registers Controlling Serial Interface UART6
  120. Operation of Serial Interface UART6
  121. CHAPTER 15 SERIAL INTERFACES CSI10 AND CSI11
  122. Configuration of Serial Interfaces CSI10 and CSI11
  123. Registers Controlling Serial Interfaces CSI10 and CSI11
  124. Operation of Serial Interfaces CSI10 and CSI11
  125. wire serial I/O mode
  126. CHAPTER 16 MULTIPLIER/DIVIDER
  127. Register Controlling Multiplier/Divider
  128. Operations of Multiplier/Divider
  129. Division operation
  130. CHAPTER 17 INTERRUPT FUNCTIONS
  131. Registers Controlling Interrupt Functions
  132. Interrupt Servicing Operations
  133. Software interrupt request acknowledgement
  134. Multiple interrupt servicing
  135. Interrupt request hold
  136. CHAPTER 18 KEY INTERRUPT FUNCTION
  137. Register Controlling Key Interrupt
  138. CHAPTER 19 STANDBY FUNCTION
  139. Registers controlling standby function
  140. Standby Function Operation
  141. STOP mode
  142. CHAPTER 20 RESET FUNCTION
  143. Register for Confirming Reset Source
  144. CHAPTER 21 CLOCK MONITOR
  145. Registers Controlling Clock Monitor
  146. Operation of Clock Monitor
  147. CHAPTER 22 POWER-ON-CLEAR CIRCUIT
  148. Configuration of Power-on-Clear Circuit
  149. Cautions for Power-on-Clear Circuit
  150. CHAPTER 23 LOW-VOLTAGE DETECTOR
  151. Registers Controlling Low-Voltage Detector
  152. Operation of Low-Voltage Detector
  153. Cautions for Low-Voltage Detector
  154. CHAPTER 24 OPTION BYTE
  155. CHAPTER 25 ROM CORRECTION
  156. Register Controlling ROM Correction
  157. ROM Correction Usage Example
  158. ROM Correction Application
  159. Program Execution Flow
  160. Cautions for ROM Correction
  161. CHAPTER 26 FLASH MEMORY
  162. Internal Memory Size Switching Register
  163. Internal Expansion RAM Size Switching Register
  164. Writing with Flash Programmer
  165. Programming Environment
  166. Connection of Pins on Board
  167. Serial interface pins
  168. RESET pin
  169. Programming Method
  170. Flash memory programming mode
  171. Selecting communication mode
  172. Communication commands
  173. Flash Memory Programming by Self-Writing
  174. Registers used for self-programming function
  175. Boot Swap Function
  176. Memory map and boot area
  177. CHAPTER 28 INSTRUCTION SET
  178. Description of operation column
  179. Operation List
  180. Instructions Listed by Addressing Type
  181. CHAPTER 29 ELECTRICAL SPECIFICATIONS
  182. CHAPTER 30 PACKAGE DRAWINGS
  183. CHAPTER 31 RECOMMENDED SOLDERING CONDITIONS
  184. CHAPTER 32 CAUTIONS FOR WAIT
  185. Peripheral Hardware That Generates Wait
  186. Example of Wait Occurrence
  187. APPENDIX A DEVELOPMENT TOOLS
  188. A.1 Software Package
  189. A.3 Control Software
  190. A.5 Debugging Tools (Hardware)
  191. A.5.2 When using on-chip debug emulator QB-78K0MINI
  192. APPENDIX B NOTES ON TARGET SYSTEM DESIGN
  193. APPENDIX C REGISTER INDEX
  194. C.2 Register Index (In Alphabetical Order with Respect to Register Symbol)
  195. APPENDIX D LIST OF CAUTIONS
  196. APPENDIX E REVISION HISTORY
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This manual is suitable for:
MuPD78F0132HMuPD78F0133HMuPD78F0134HMuPD78F0136HMuPD78F0138HMuPD78F0138HD
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