“Confidential, Do Not Duplicate without written authorization from NEC.”8-19CIRCUIT DESCRIPTIONFFIB PWB (FPGA Formatter Interface Board)PWC-4683In the Cinema circuit, the FFIB PWB enters the video data of the VIDEO processor and the SOFTWARE processorin the LVTTL (3.3V) 16-bit EVEN/ODD format. After passing through various functional processing of Item 1below, the data are transmitted to the FSB in the LVDS (2.5V) 16-pair format.In the bootstrapping mode, configuration control is also carried out for each FSB.Signal Name Description I/O TypeMB_RESETZ Hardware Reset I LVTTLMB_POWERGOOD Main Power Status I LVTTLSignal Name Description I/O TypeFCLK Pixel Clock I LVTTLO/E [R/G/B] (15:0) Video Data, Odd/Even I LVTTLO/E [R/G/B]_SIGN Video Data, Odd/Even Sign I LVTTLO/E [R/G/B]_RSVD Video Data, Odd/Even Reserved 1 LVTTLMB_ACTDATA Input Active Data I LVTTLMB_VSYNCZ Input Vertical Sync I LVTTLMB_HSYNCZ Input Horizontal Sync I LVTTLMB_OLCATE Input Overlay Active Even I LVTTLMB_OLACTO Input Overlay Active Odd I LVTTLMB_SYNCVAL Input Sync Vaild I LVTTLMB_3D_SYNC_IN 3D Input Reference I LVTTLMB_3D_SYNC_OUT 3D Output reference O LVTTL1. Electrical Interface1-1. Intialzatopm1-2. Main Data Interface
