NXP Semiconductors 56F803 User Manual

Motor Protection LogicTechnical Summary, Rev. 5Freescale Semiconductor 2-152.14.1 UNI-3 Motor Protection LogicThe UNI-3 DC Bus Over-Voltage signal is connected to the controller’s PWM group’s faultinput, FAULT0. The UNI-3 DC Bus Over-Current signal is connected to the device’s PWMgroup’s fault input, FAULT1. Additionally, the UNI-3 DC Bus Over-Voltage and Over-Currentanalog signals are connected to two A/D inputs, AN0 and AN1, respectively. Figure 2-11contains the diagram of the DC Bus Over-Voltage and DC Bus Over-Current circuit for theUNI-3 interface.Figure 2-11. DC Bus Over-Voltage and Over-Current Detection Schematic Diagram+5.0V+3.3VI_sense_DCBFAULT1LM393DC BUS CURRENT SENSE+–+5.0V+5.0V+3.3VV_sense_DCBFAULT0LM393DC BUS VOLTAGE SENSE+–+5.0V