TWR-KL28Z Hardware DescriptionTWR-KL28Z User’s Guide, Rev. 0, 06/2016NXP Semiconductors 7Table 3. Features of MKL28Z512VLL7Feature DescriptionMixed-signalcapability- SAR 16-bit analog-to-digital converter (ADC)- High-speed comparator (CMP) with internal 6-bit digital-to-analog converter (DAC)- 12-bit digital-to-analog converter (DAC)- VREF module 1.2 V outputPerformance- 72 MHz ARM Cortex-M0+ core- Up to 16 channel DMA for peripheral and memory servicing with reduced CPU loadingand faster system throughput- Cross bar switch enables concurrent multi-master bus accesses, increasing busbandwidth- Independent flash banks allowing concurrent code execution and firmware updating withno performance degradation or complex coding routines- Bit manipulation engine (BME) allows execution of single-instruction atomic bit-modify-write operations on the peripheral address spaceTiming and control- Three timer/PWM modules – one with six channel, and two with two channels- Low-power timer- Real-time clock- 4-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler ortrigger source for ADC conversion, provides lifetime timer capabilityHuman-machineinterfaceConnectivity andcommunications- Touch sensing input- General-purpose input/output up to 54- USB full-speed OTG controller with on-chip transceiver and 5 V to 3.3 V regulator,supporting crystal-less recovery- USB low-voltage regulator supplies up to 120 mA off chip at 3.3 volts to power externalcomponents from 5-volt input- Three 32-bit LPSPI modules- Three LPUART modules- Three LPI2C modules supporting Ultra-Fast mode- One I2S (SAI) module- FlexIO module4.3.1. Clock sourceThe Kinetis MCUs start up to the default reset clock for core/system clock, which is 8 MHz from SIRC.Software can enable the main external oscillator (EXTAL/XTAL), or to high frequency internalreference (FIRC) 48 MHz if desired. The external oscillator/resonator can range from 32.768 KHz up toa 32 MHz. An 8 MHz crystal is the default external source for the SCG oscillator inputs(XTAL/EXTAL).4.3.2. Serial portThe primary serial port interface signals are PTA1 and PTA2. These signals are connected to both theCMSIS-DAP and to the J1 I/O connector.