Configuration and Installation Chapter 2SCXI-1160 User Manual 2-19 © National Instruments CorporationTable 2-4. SCXIbus to SCXI-1160 Rear Signal Connector to Data AcquisitionBoard Pin EquivalencesSCXIbus LineSCXI-1160 RearSignal ConnectorMIO-16Lab-NB/Lab-PC/Lab-PC+/Lab-LCPC-LPM-16DIO-24DIO-96DIO-32FMOSID*/AINTR*SPICLKMISOSERDATINDAQD*/ASLOT0SEL*SERCLKSERDATOUTADIO0ADIO1ADIO2EXTSTROBE*BDIO0PB4PB5PB6PB7PC1DOUT4DOUT5DOUT6DOUT7DIN6PB3PB2PB1PB0PA0APB3APB2APB1APB0APA0DIOB3DIOB2DIOB1DIOB0DIOA0The following specifications and ratings apply to the digital I/O lines.Absolute maximum voltageinput rating 5.5 V with respect to DIG GNDDigital input specifications (referenced to DIG GND):VIH input logic high voltage 2 V minimumVIL input logic low voltage 0.8 V maximumII input current leakage ±1 μA maximumDigital output specifications (referenced to DIG GND):VOH output logic high voltage 3.7 V minimum at 4 mA maximumVOL output logic low voltage 0.4 V maximum at 4 mA maximumTiming Requirements and Communication ProtocolCommunication SignalsThis section describes the methods for communicating on the Serial Peripheral Interface (SPI)bus and their timing requirements. The communication signals are SERDATIN, DAQD*/A,SLOT0SEL*, SERDATOUT, and SERCLK. Furthermore, Slot 0 produces SS* according todata acquisition board programming; therefore SS* timing relationships will also be discussed.For information on the Slot 0 Slot-Select Register, consult Chapter 4, Register Descriptions.Use the following data acquisition board determines to which slot it will talk to by writing a slot-select number to Slot 0. In the case of an SCXI-1001 chassis, this write also determines to whichchassis the data acquisition board will talk.
