Oki OKIPAGE 4M Maintenance Manual

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Contents

2 - 4Controls DRAM.Built-in Device FunctionDRAM controllerTransfers image data from Parallel I/F to DRAM, from DRAM to a video output port andbetween CPU and DRAM.Video output portLED STB output portGenerates various control timings for monitoring paper feeding and a paper size.Inputs the feedback signals from a high-voltage generation circuit and thermistor signal.DMA controllerParallel interface controllerTimerI/O portA/D converterControls the parallel interface.Controls LED head.Inputs and outputs the sensor signals and motor signals, etc.Also performs I/O for EEPROM.2.1 Main Control BoardThe main control board consists of a one-chip CPU, a program ROM, a DRAM, an EEPROM, ahost interface circuit, and a mechanism driving circuit. The mechanism driving circuit consists ofa LED head, a main motor, and an electromagnetic clutch.(1) One-chip CPUThe one-chip CPU is a custom CPU (8-bit internal bus, 8-bit external bus, 10-MHz clock)incorporating mask ROM and CPU peripheral devices. This CPU has the functions listed inthe table below.(2) Program ROMProgram ROM contains a program for the equipment. EPROM is used as program ROM.When mask ROM in the one-chip CPU explained in (1) above is valid, the EPROM is notmounted. (For details on short wiring setting, see Section 7.2.)(3) DRAMDRAM is used as resident memory.(4) EEPROMEEPROM holds the following data:• Menu data• Counter value• Adjustment value(5) Parallel interfaceThe parallel interface receives parallel data from the host; it conforms to the IEEE1284specification.(6) Macintosh interface Mcintosh interfacce receives serial data from the host ; it conforms to the IEEE1284.