Contents - Alphabetical Listing of Instructions
- Table Of Contents
- Table Of Contents
- Table Of Contents
- Table Of Contents
- Document Conventions
- Processor Registers
- OpCode Descriptions
- ADC HL,ss
- ADD HL,ss
- ADD IX,xx
- ALTD
- AND (HL)
- AND HL,DE
- BIT b,(HL)
- CP (IX+d)
- DEC (HL)
- EX (SP),HL
- EX AF,AF
- INC (HL)
- IPSET
- IPRES
- LCALL x,mn
- LD (BC),A
- LD (HL+d),HL
- LD (IX+d),n
- LD (IY+d),n
- LD (mn),A
- LD (SP+n),HL
- LD A,(mn)
- LD A,IIR
- LD dd,(mn)
- LD dd,mn
- LD HL,(mn)
- LD HL,(SP+n)
- LD IX,(mn)
- LD IX,mn
- LD IY,(SP+n)
- LD r,(HL)
- LD SP,HL
- LDDR
- LDP (HL),HL
- LDP (mn),HL
- LDP HL,(HL)
- LDP HL,(mn)
- LJP x,mn
- OR (IY+d)
- OR HL,DE
- RES b,(HL)
- RETI
- RL (IX+d)
- RLC (HL)
- RLCA
- RR (IX+d)
- RRC (HL)
- RRCA
- SBC (IX+d)
- SBC HL,ss
- SET b,(HL)
- SLA (HL)
- SRA (HL)
- SRL (HL)
- SUB (HL)
- XOR (HL)
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Instruction Reference Manual 91DescriptionRotates to the right the data in the register r (any of the registers A, B, C, D, E, H, or L). Each bit in the regis-ter moves to the next lowest-order bit position (bit 7 moves to bit 6, etc.) while bit 0 moves to both bit 7 andthe CF. See Figure 4 on page 90.DescriptionRotates to the right the data in the Accumulator. Each bit in the register moves to the next lowest-order bitposition (bit 7 moves to bit 6, etc.) while bit 0 moves to both bit 7 and the CF. See Figure 4 on page 90.RRC rOpcode Instruction Clocks Operation——CB 0FCB 08CB 09CB 0ACB 0BCB 0CCB 0DRRC rRRC ARRC BRRC CRRC DRRC ERRC HRRC L4 (2,2)4 (2,2)4 (2,2)4 (2,2)4 (2,2)4 (2,2)4 (2,2)4 (2,2)r = {r[0],r[7,1]}; CF = r[0]A = {A[0],A[7,1]}; CF = A[0]B = {B[0],B[7,1]}; CF = B[0]C = {C[0],C[7,1]}; CF = C[0]D = {D[0],D[7,1]}; CF = D[0]E = {E[0],E[7,1]}; CF = E[0]H = {H[0],H[7,1]}; CF = H[0]L = {L[0],L[7,1]}; CF = L[0]Flags ALTD I/OS Z L/V C F R SP S D• • L • • •RRCAOpcode Instruction Clocks Operation0F RRCA 2 A = {A[0],A[7,1]}; CF = A[0]Flags ALTD I/OS Z L/V C F R SP S D- - - • • •
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