5544332211D DC CB BA A0: Watchdog Timer Enabled1: Watchdog Timer DisabledAsk Chris change the ballname to BOOT_OPT, WDT_EN_N,do not confuse customer0: MIPS BOOTSTRAP1: EEPROM BOOTSTRAPVOL+MENUINPUT/EXIT CH+VOL- CH- POWER2010/12/ 20 IR pin define changedAdding option resistorto save LED_G2011/11/01Preventing the flash onLED 2011/11/01Connecting to ground forADC8 calibration.2011/11/09Reserving for Panel PWM150Hz. 2011/11/01FP_KEY_IN1IRRVGA_SDAVGA_SCLRESETNUART0_TXUART0_RXFP_KEY_IN2WDT_EN_N_LED2VGA_VSYNC_0FP_GPIOTVM_PWR_ON2TVM_BOOT_LED1WDT_EN_N_LED2TVM_BOOT_LED1UART0_TXUART0_RXLED_RFP_KEY_IN1FP_KEY_IN2FP_GPIOLight_SensorLED_RIRRLED_GLight_SensorVCC1_1_STBVCC3_3_STBVCC3_3_STBVCC3_3_STBVCC3_3_STBVCC3_3_STBVCC3_3_STBVCC3_3_STBGNDGNDGNDVCC5_0_STBVGA_SCLP7VGA_SDAP7TVM_PWR_ON2P3VGA_VSYNC_0P7RESETN P4UART0_RXP7UART0_TXP7PG_MUTEP3,9HDMI0_5VP5HDMI0_HPDP5HDMI1_5VP5HDMI1_HPDP5HDMI0_DDC_SCLP5HDMI0_DDC_SDAP5HDMI_CEC_INP5HDMI1_DDC_SDAP5HDMI1_DDC_SCLP5BL_CP3TVM_PWR_ON1P3LED_G P10HDMI2_HPDP5HDMI2_5VP5HDMI2_DDC_SDAP5HDMI2_DDC_SCLP5BL_ERRP3PWM2P3FP_GPIOP4TitleSize Document Number RevDate: Sheet ofSCHEMATIC,M/B VTV-L42612COMPAL OPTOELECTRONICS CO., LTD11 15Tuesday, January 17, 20121XXXXXXTitleSize Document Number RevDate: Sheet ofSCHEMATIC,M/B VTV-L42612COMPAL OPTOELECTRONICS CO., LTD11 15Tuesday, January 17, 20121XXXXXXTitleSize Document Number RevDate: Sheet ofSCHEMATIC,M/B VTV-L42612COMPAL OPTOELECTRONICS CO., LTD11 15Tuesday, January 17, 20121XXXXXXR1513.3K/1%R1513.3K/1%C782.2uF/16V/0805C782.2uF/16V/0805TP8TP8C387100pF/25V/0402C387100pF/25V/0402R1483.9K/1%/0402R1483.9K/1%/0402GNDS3SW PUSH/4P/90D/1.3MMGNDS3SW PUSH/4P/90D/1.3MM24 31L9KLB0402E601SAL9KLB0402E601SAR145 0/NCR145 0/NCR1521.2K/1%R1521.2K/1%GNDS6SW PUSH/4P/90D/1.3MMGNDS6SW PUSH/4P/90D/1.3MM24 31R1780/NCR1780/NCC374100pF/25V/0402/NCC374100pF/25V/0402/NCR6910K/1%/0402R6910K/1%/0402D17AZ5125/NCD17AZ5125/NCR7418K/1%/0402R7418K/1%/040212C385100pF/25V/0402/NCC385100pF/25V/0402/NCL10KLB0402E601SAL10KLB0402E601SAR103 10K/1%/NCR103 10K/1%/NC1 2R67 4.7K/0402R67 4.7K/0402D8AZ5125/NCD8AZ5125/NCL8KLB0402E601SAL8KLB0402E601SAD16AZ5125/NCD16AZ5125/NCL64PBY160808T-121Y-N 2.5AL64PBY160808T-121Y-N 2.5A12R10639K/1%/NCR10639K/1%/NC12C7710nF/16V/0402C7710nF/16V/0402GNDS2SW PUSH/4P/90D/1.3MMGNDS2SW PUSH/4P/90D/1.3MM24 31R465 0/0402R465 0/0402C801uF/6.3V/0402C801uF/6.3V/0402R7310K/1%/0402R7310K/1%/0402R1444.7K/NCR1444.7K/NCR540/1206R540/120612R7610K/1%/0402R7610K/1%/0402R68 4.7K/0402/NCR68 4.7K/0402/NCR1543.3K/1%R1543.3K/1%GNDS1SW PUSH/4P/90D/1.3MMGNDS1SW PUSH/4P/90D/1.3MM2431R70 0/0402R70 0/0402R1563.9K/1%/0402R1563.9K/1%/0402R177 0/NCR177 0/NCC821uF/6.3V/0402C821uF/6.3V/0402C373100pF/25V/0402C373100pF/25V/0402R15310K/1%/0402R15310K/1%/0402GNDS7SW PUSH/4P/90D/1.3MMGNDS7SW PUSH/4P/90D/1.3MM24 31R1274.7KR1274.7KGNDS4SW PUSH/4P/90D/1.3MMGNDS4SW PUSH/4P/90D/1.3MM24 31R1493.9K/1%/0402R1493.9K/1%/0402C7910nF/16V/0402C7910nF/16V/0402C388100pF/25V/0402C388100pF/25V/0402R72 0R72 0R15010K/1%/0402R15010K/1%/0402C3724.7uF/6.3V/NCC3724.7uF/6.3V/NC12MCU I/FU1LZR39748_BGA_A3MCU I/FU1LZR39748_BGA_A3POWER_CTL1/TV_DEBUG[2]D5POWER_CTL2/TV_DEBUG[3]C5TVCPU_PWM0D7RESET_N E1TVCPU_I2C1C/UART0TXA6TVCPU_I2C1D/UART0RXC7HDMI0_SCLE4HDMI0_SDAE3GPIO_TV_P6/HDMI2_5VSENSEC2 GPIO_TV_P7/HDMI2_HPDB1HDMI0_5VSENSED1HDMI0_HPDE2VGA_SCL/TV_DEBUG[7]B3VGA_SDA/TV_DEBUG[8]A3ADC8_RBIAS F6GPIO_TV_P0/HDMI1_SCLD4GPIO_TV_P1/HDMI1_SDAD3GPIO_TV_P2/HDMI1_5VSENSEC1GPIO_TV_P3/HDMI1_HPDD2GPIO_TV_P4/HDMI2_SCLC4GPIO_TV_P5/HDMI2_SDAC3IOVDD_STBY1 G6COREVDD_STBY G7CLK25M_VDD F7ADC8_IN0C8ADC8_IN1D8ADC8_IN2C9ADC8_IN3D9IRRA2T0/TV_DEBUG[7]B4T1/TV_DEBUG[8]B6INT0_N/TV_DEBUG[4]C6INT1_N/TV_DEBUG[5]D6INT2/TV_DEBUG[6]/AFE_VSYNC_INB2WDT_EN_NB5BOOT_OPTA5HDMI_CECA1IOVDD_STBY2 H6CLKIN_RTC A7CLKOUT_RTC B7ADC8_IN6D13CN4JWT A2001WR2-6PCN4JWT A2001WR2-6P123456R1551.2K/1%R1551.2K/1%R458 0/0402R458 0/0402D13AZ5125/NCD13AZ5125/NCC8110nF/16V/0402C8110nF/16V/0402R75 30K/1%/0402R75 30K/1%/04021 2R71 10K/1%/0402R71 10K/1%/0402C8322pF/50V/0402C8322pF/50V/0402GNDS5SW PUSH/4P/90D/1.3MMGNDS5SW PUSH/4P/90D/1.3MM24 31