-41-● System Control & I/O Port Table (IC801)■ Control Port Functions1 PA23/WRHH USB RESET USB Reset Signal Active L O2 PE14/TIOC4C/DACK0/AH IC RESET Power on/off control except FAN and LAMP Active L O3 PA22/WRHL4 PA21/CASHH RS232C_SW Not used5 PE15/TIOC4D/DACK1/IRQOUT POWER SW Power ON: H, Power OFF: L O6 VSS GND7 PC0/A0 ADDRESS0 Address Bus 0 O8 PC1/A1 ADDRESS1 Address Bus 1 O9 PC2/A2 ADDRESS2 Address Bus 2 O10 PC3/A3 ADDRESS3 Address Bus 3 O11 PC4/A4 ADDRESS4 Address Bus 4 O12 VCC 5V13 PC5/A5 ADDRESS5 Address Bus 5 O14 VSS GND15 PC6/A6 ADDRESS6 Address Bus 6 O16 PC7/A7 ADDRESS7 Address Bus 7 O17 PC8/A8 ADDRESS8 Address Bus 8 O18 PC9/A9 ADDRESS9 Address Bus 9 O19 PC10/A10 ADDRESS10 Address Bus 10 O20 PC11/A11 ADDRESS11 Address Bus 11 O21 PC12/A12 ADDRESS12 Address Bus 12 O22 PC13/A13 ADDRESS13 Address Bus 13 O23 PC14/A14 ADDRESS14 Address Bus 14 O24 PC15/A15 ADDRESS15 Address Bus 15 O25 PB0/A16 ADDRESS16 Address Bus 16 O26 VCC 5V27 PB1/A17 ADDRESS17 Address Bus 17 O28 VSS GND29 PA20/CASHL SCL 1 IIC Bus 1 Clock I/O30 PA19/BACK/DRAK1 SDA 1 IIC Bus 1 Data I/O31 PB2/IRQ0/POE0/RAS32 PB3/IRQ1/POE1/CASL33 PA18/BREQ/DRAK0 SYS SW Peripheral IC Power SW (ON=L, OFF=H) O34 PB4/IRQ2/POE2/CASH AFT-V Vertical Sync. Signal for Panel Drive Active L I35 VSS GND36 PB5/IRQ3/POE3/RDWR DE_DIF Detect DVI Effective I37 PB6/IRQ4/A18/BACK ADDRESS18 Address Bus 18 O38 PB7/IRQ5/A19/BREQ ADDRESS19 Address Bus 19 O39 PB8/IRQ6/A20/WAIT ADDRESS20 Address Bus 20 O40 VCC 5V41 PB9/IRQ7/A21/ADTRG ADDRESS21 Address Bus 21 O42 VSS GND43 PA14/RD READ Read signal Active L O44 WDTOVF SEREKUTO Over flow output from Watch dog timer O45 PD31/D31/ADTRG RTS RS232C RTS (Request To Send) I46 PD30/D30/IRQOUT CTS RS232C CTS (Clear To Send) O47 PA13/WRH48 PA12/WRL WRL Write signal (Lower 8 bit) Active L O49 PA11/CS1 ET7050SELECT Select SW for Color Correct. ET7050 O50 PA10/CS0 CS0 Flash Memory Chip Select Active L O51 PA9/TCLKD/IRQ3 SCL 2 IIC Bus 2 Clock I/O52 PA8/TCLKC/IRQ2 SDA 2 IIC Bus 2 Data I/O53 PA7/TCLKB/CS3 CS3 USB/IO EXP Chip Select Active L O54 PA6/TCLKA/CS2 CS2 SRAM/CXD3511Q Chip Select Active L O55 VSS GND56 PD29/D29/CS357 PD28/D28/CS2 PW_SEL PW365 RS232C Select O58 PD27/D27/DACK1 PW_INTR PW_365 Dividing signal O59 PD26/D26/DACK0 PW_OUT1 PW_365 Data output (reserve) O60 PD25/D25/DREQ1 PW_OUT0 PW_365 Data output (reserve) O61 VSS GND62 PD24/D24/DREQ0 DAC_CS Select signal for DAC M62358 O63 VCC 5V64 PD23/D23/IRQ7 DVI_PC DVI = L O65 PD22/D22/IRQ6 DVI_OUT DVI = L O66 PD21/D21/IRQ5 CG_HD CG = L O67 PD20/D20/IRQ468 PD19/D19/IRQ369 PD18/D18/IRQ2 PW_IN1 PW365 Data input (reserve) I70 PD17/D17/IRQ1 PW_IN0 PW365 Data input (reserve) I71 VSS GNDPin No. Name Function Name Function Polarity I/O