– 4 –Fig. 1-3. IC901 Block Diagram3. Part of IC905 (generation of vertical transfer clock,H Driver) and IC901 (V Driver)An H driver (part of IC905) and V driver (IC901) are neces-sary in order to generate the clocks (vertical transfer clock,horizontal transfer clock and electronic shutter clock) whichdriver the CCD.IC905 has the generation of horizontal transfer clock and thefunction of H driver, and is an inverter IC which drives thehorizontal CCDs (H1 and H2). It carries out generating verti-cal transfer clock, and output to IC901.In addition the XV1-XV6 signals which are output from IC905are vertical transfer clocks, and the XSG signal is superim-posed onto XV1, XV3 and XV5 at IC901 in order to generatea ternary pulse. In addition, the XSUB signal which is outputfrom IC101 is used as the sweep pulse for the electronic shut-ter, and the RG signal which is output from IC905 is the resetgate clock.Fig. 1-4. IC905 Block Diagram4. IC905 (H Driver, CDS, AGC and A/D converter)IC905 contains the functions of H driver, CDS, AGC and A/Dconverter. As horizontal clock driver for CCD image sensor,HØ1 (A and B) and HØ2 (A and B) are generated inside, andoutput to CCD.The video signal which is output from the CCD is input to pin(A6) of IC905. There are sampling hold blocks generated fromthe SHP and SHD pulses, and it is here that CDS (correlateddouble sampling) is carried out.After passing through the CDS circuit, the signal passesthrough the AGC amplifier (VGA: Variable Gain Amplifier). Itis A/D converted internally into a 14-bit signal, and is theninput to ASIC (IC101). The gain of the VGA amplifier is con-trolled by pin (A2), (B3) and (C4) serial signal which is outputfrom ASIC (IC101).1332333130373835363442434439404142613141211SUBCNTVDCCH1V1V6V4V5RV5LV3RV3LV1SCH5V5CH3CH4V3CH2GNDVHOV3BOV3AOV5BOV5ALevelconversion29V22 SUBLevelconversionLevelconversionLevelconversionLevelconversionLevelconversionLevelconversionLevelconversionLevelconversionLevelconversionLevelconversionLevelconversionLevelconversionLevelconversionLevelconversionLevelconversionLevelconversionLevelconversion28RESET20OV18VM21OV623OV424OV227VL10OSUB9VMSUB5VL2-level2-level2-level3-level2519171518VMOV1SOV3LOV3ROV5L716 OV5RVHH6 VH2-level2-level2-level2-level2-level3-level3-level3-level3-level3-level CCDINHLH1 TO H8SYNCHDSDISCKSLDOUTREFBREFTPRECISIONTIMINGGENERATORSYNCGENERATORVGA 14-BITADC146~42 dBVREFCLAMPINTERNALREGISTERSINTERNALCLOCKSCDSHORIZONTALDRIVERS8AD9996-3dB, 0dB, +3dBVD CLI CLOVERTICALTIMINGCONTROLXV1 TO XV24 24XSUBCKRGGP01 TO GP083V INPUT1.8V OUTPUT1.8V INPUT3V OUTPUTCHARGEPUMPLDOREG8