Sanyo VPC-S60 Service Manual

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– 4 –Fig. 1-3. IC901 Block Diagram3. IC905 (H Driver) and IC901 (V Driver)An H driver (a part of IC905) and V driver (IC901) are neces-sary in order to generate the clocks (vertical transfer clock,horizontal transfer clock and electronic shutter clock) whichdriver the CCD.IC905 has clock generating which drives horizontal CCD andits drives function. These clocks are output from pin (14), (15),(18) and (19) of IC905. In addition the XV1-XV8 signals whichare output from IC101 are the vertical transfer clocks, and theXSG1A, XSG1B, XSG3A, XSG3B, XSG5A, XSG5B, XSG7Aand XSG7B signals which are output is superimposed ontoXV1, XV3, XV5 and XV7 at IC901 in order to generate a ter-nary pulse. In addition, the XSUB signal which is output fromIC101 is used as the sweep pulse for the electronic shutter,and the RG signal which is output from pin (21) of IC905 isthe reset gate clock.4. IC905 (CDS, AGC Circuit and A/D Converter)The video signal which is output from the CCD is input topins (27) of IC905. There are S/H blocks inside IC905 gener-ated from the XSHP and XSHD pulses, and it is here thatCDS (correlated double sampling) is carried out.After passing through the CDS circuit, the signal passesthrough the AGC amplifier. It is A/C converted internally intoa 12-bit signal, and is then input to IC101 of the CP1 circuitboard. The gain of the AGC amplifier is controlled by pin (31)-(33) serial signal which is output from IC101 of the CP1 board.Fig. 1-4. IC905 Block DiagramCCDINRGH1-H4VDHD SDATASCKSLCLIHBLKCLP/PBLKDOUTVRBVRTPRECISIONTIMINGCORESYNCGENERATORPxGA VGA 12-BITADC126~42 dBVREFCLAMPINTERNALREGISTERSINTERNALCLOCKSCDSHORIZONTALDRIVERS40~18 dBAD9949C1F2F1E2E1D2D1B1L3L2A4 VL2XV5NDVD1AVD1XSUBNXSG9NXV2NXSG7NXV7NXSG5NInput BufferAVS1G10XV3NF11XSG3NF10XV1NA6 VH2A10 VM2C2 SUBE11XSG1NE10XV4ND11XV9NK9XSG10NK11J2J1H2H1G2H10H11J10J11XV8NXV6NXSG8NXSG6NXV13NXV12NXSG4NXV11NXSG2NXV14NK1XV10NB11AVS2C11AVD2L10DVD2A2 V2B4 V7AA5 V5AB6 V3AA8 V1AB8 V4A9 V9C10 V6B9 V7BB7 V5BA7 V3BB5 V1BA3 V8B3 V10L4 VM1L5 VH1L7 VL1