Tait TM9100 Service Manual

Also see for TM9100: Installation guide User guide Installation guide Safety information User guide

Contents

Tait TM9100 Service Manual Manual pdf 68 page image

68 Circuit Descriptions TM9100 Service Manual© Tait Electronics Limited August 20053.2 Receiver CircuitryIntroduction For a block diagram of the receiver circuitry, refer to Figure 3.3.The receiver is of the triple-conversion superheterodyne type. The first twoIF stages are implemented in hardware; the third stage is implemented in theFPGA (field-programmable gate array) of the digital board. The FPGA alsocarries out the demodulation of the received signals.Front-End Circuitry The front-end circuitry is a standard varicap-tuned singlet (band-pass filter),followed by an LNA (low-noise amplifier), and then a varicap-tuneddoublet (image filter). The varicap tuning voltage CDC RX FE TUNE is providedby a DAC, with voltages calculated from a calibration table stored in non-volatile memory. The two varicap-tuned filters need to be calibrated toensure that maximum sensitivity is achieved.First Mixer The first mixer is a standard diode-ring mixer with SMD (surface-mountdevice) baluns and a quadruple SMD diode. For the VHF band the receiverincludes a circuit for suppressing ignition noise. This circuit momentarilyremoves the LO signal from the mixer when an ignition noise pulse isdetected. The ignition-noise suppressor is selectable on a per-channel basiswhen the radio is programmed.First IF Stage andSecond Mixer The first IF stage consists of a crystal channel filter (BPF1), followed by anIF amplifier, and then another crystal filter (BPF2). The second mixer is anIC quadrature mixer with an internal AGC amplifier. This IC has a divide-by-two function on the LO input in order to provide the quadrature LOfrequencies required internally. The second LO frequency is synthesized byan integer PLL (IC403), which uses the TCXO frequency SYN RX OSC(13.0000 MHz) as its reference.Frequenciesof IF Stages The frequency of the first IF stage depends as follows on the frequency bandof the radio:■ B1 band: 21.400029MHz■ H5, H6, and H7 bands: 45.100134MHzThe above are nominal values; the actual frequency will differ by a smallamount depending on the exact initial frequency of the TCXO.The frequency of the second IF stage will always be precisely 64.000kHzonce the TCXO calibration has been completed. (The TCXO calibrationdoes not adjust the TCXO frequency, but instead adjusts the VCXOfrequency, which in turn adjusts the VCO or first LO frequency as well asthe frequency of the first IF stage. The second LO frequency remains fixed.)The third IF stage is completely within the FPGA and is not accessible.