22 www.xilinx.com KC724 GTX Transceiver Characterization BoardUG932 (v2.2) October 10, 2014Chapter 1: KC724 Board Features and OperationUser LEDs (Active High)Callout 23, Figure 1-2.DS13 through DS20 are eight active-High LEDs that are connected to user I/O pins on theFPGA as shown in Table 1-10 These LEDs can be used to indicate status or any otherpurpose determined by the user.User DIP Switches (Active High)Callout 24, Figure 1-2.The DIP switch SW2 provides a set of eight active-High switches that are connected to userI/O pins on the FPGA as shown in Table 1-10. These pins can be used to set control pins orany other purpose. Six of the eight I/Os also map to 2 x 6 test header J125 providingexternal access for these pins (callout 25, Figure 1-2.).Table 1-9: User LEDsFPGA (U1) Schematic NetNameReferenceDesignatorPin Function Direction IOSTANDARDA20 User LED Output LVCMOS18 APP_LED1 DS19A17 User LED Output LVCMOS18 APP_LED2 DS20A16 User LED Output LVCMOS18 APP_LED3 DS17B20 User LED Output LVCMOS18 APP_LED4 DS18C20 User LED Output LVCMOS18 APP_LED5 DS16F17 User LED Output LVCMOS18 APP_LED6 DS15G17 User LED Output LVCMOS18 APP_LED7 DS13B17 User LED Output LVCMOS18 APP_LED8 DS14Table 1-10: User DIP SwitchesFPGA (U1) SchematicNet NameDIP SwitchReferenceJ125 TestHeader PinPin Function Direction IOSTANDARDE18 User switch Input LVCMOS18 USER_SW1SW22B19 User switch Input LVCMOS18 USER_SW2 4C19 User switch Input LVCMOS18 USER_SW3 6A22 User switch Input LVCMOS18 USER_SW4 8B22 User switch Input LVCMOS18 USER_SW5 10A18 User switch Input LVCMOS18 USER_SW6 12B18 User switch Input LVCMOS18 USER_SW7 –A21 User switch Input LVCMOS18 USER_SW8 –Send Feedback