Keysight Technologies 16860 Series manuals
16860 Series
Table of contents
- safety notices
- Keysight 16860 Series Logic Analyzer - At a Glance
- Features, Mainframe
- In This Service Guide
- Table Of Contents
- Table Of Contents
- Table Of Contents
- general information
- General Information Accessories
- Specifications
- Characteristics
- 2 Preparing for Troubleshooting or Performance Testing
- Operating Environment
- To apply power
- To clean the instrument
- To start the user interface
- To test the 16860 series logic analyzer
- 3 Testing 16860 Series Logic Analyzers Performance
- Perform the Self-Tests
- Equipment Required for the Performance Test
- Assemble the SMA/Flying Lead Test Connectors
- Set Up the Test Equipment
- Connect the Test Equipment
- Test the 16860 series Logic Analyzer
- Create Test Configuration Files
- Create Configuration File 2 - Multiple Clocks (with Marker)
- Create Configuration File 3 - Single Clock (no Marker)
- Create Configuration File 4 - Single Clock with Marker
- Determine Maximum Data Rate for Multiple Clocks Mode
- Pod 1 Clock - Setup for Maximum Data Rate
- Pod 1 Clock - Measuring Maximum Data Rate
- Pod 2 Clock - Maximum Clock Rate
- Pod 2 Clock - Setup for Maximum Data Rate
- Pod 2 Clock - Measuring Maximum Data Rate
- Pod 3 Clock - Maximum Clock Rate
- Pod 3 Clock - Setup for Maximum Data Rate
- Pod 3 Clock - Measuring Maximum Data Rate
- Pod 4 Clock - Maximum Clock Rate
- Pod 4 Clock - Setup for Maximum Data Rate
- Pod 4 Clock - Measuring Maximum Data Rate
- Determine Maximum Data Rate for Single Clock Mode
- Single Clock Rising Edge - Pod 1 Data - Setup for Maximum Data Rate
- Single Clock Rising Edge - Pod 1 Data - Measuring Maximum Data Rate
- Single Clock Falling Edge - Maximum Clock Rate
- Single Clock Falling Edge - Pod 1 Data - Setup for Maximum Data Rate
- Single Clock Falling Edge - Pod 1 Data - Measuring Maximum Data Rate
- Single Clock Both Edges - Maximum Clock Rate
- Single Clock Both Edges - Pod 1 Data - Setup for Maximum Data Rate
- Single Clock Both Edges - Pod 2 Data - Setup for Maximum Data Rate
- Single Clock Both Edges - Pod 2 Data - Measuring Maximum Data Rate
- Single Clock Both Edges - Pods 3 to 8
- Conclude the State Data Rate Tests
- Performance Test Record
- Calibration Strategy
- troubleshooting
- To use the system troubleshooting flowcharts
- To use the logic acquisition troubleshooting flowcharts
- To troubleshoot system power problems
- To run the self-tests
- Logic Acquisition Self-Test Descriptions
- To exit the test system
- To restore the system software
- Contacting Keysight Service/Support
- To test the logic acquisition cables
- Before you Start
- Back Up Data and License Files
- Removing and Replacing the Hard Drive, Acquisition Bezel, and Cover
- Removing and Replacing the Front Panel
- Disassembling the Front Panel
- Removing and Replacing the Fan Deck
- Removing and Replacing the Acquisition Tray
- Removing and Replacing the Duct
- Removing and Replacing the Motherboard
- Removing and Replacing the FIB Board
- Removing and Replacing the Power Supply Shroud and Power Supply
- Returning the 16860 Series Logic Analyzer or its Assemblies
- Ordering Replaceable Parts
- Replaceable Parts List
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