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National Instruments AT-MIO/AI E Series manuals

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AT-MIO/AI E Series

Brand: National Instruments | Category: Computer Hardware
Table of contents
  1. important information
  2. Table Of Contents
  3. Table Of Contents
  4. Table Of Contents
  5. Table Of Contents
  6. Table Of Contents
  7. Table Of Contents
  8. organization of this manual
  9. conventions used in this manual
  10. related documentation
  11. About the AT E Series
  12. What You Need to Get Started
  13. Software Programming Choices
  14. Register-Level Programming
  15. Custom Cabling
  16. Unpacking
  17. Software Installation
  18. Board Configuration
  19. Plug and Play
  20. Interrupt Channel Selection
  21. Table 2-2. PC AT Interrupt Assignment Map
  22. Table 2-3. PC AT 16-bit DMA Channel Assignment Map
  23. Figure 3-1. AT-MIO-16E-1 and AT-MIO-16E-2 Block Diagram
  24. Figure 3-2. AT-MIO-64E-3 Block Diagram
  25. Figure 3-3. AT-MIO-16E-10 and AT-MIO-16DE-10 Block Diagram
  26. Figure 3-4. AT-MIO-16XE-10 Block Diagram
  27. Figure 3-5. AT-AI-16XE-10 Block Diagram
  28. Analog Input
  29. Input Polarity and Input Range
  30. Considerations for Selecting Input Ranges
  31. Dither
  32. Multiple-Channel Scanning Considerations
  33. Analog Output
  34. Analog Output Reglitch Selection
  35. Figure 3-8. Analog Trigger Block Diagram
  36. Figure 3-9. Below-Low-Level Analog Triggering Mode
  37. Figure 3-12. High-Hysteresis Analog Triggering Mode
  38. Digital I/O
  39. Programmable Function Inputs
  40. Board and RTSI Clocks
  41. Figure 3-15. RTSI Bus Signal Connection
  42. I/O Connector
  43. AT-AI-16XE-10, and AT-MIO-16XE-50
  44. Figure 4-2. I/O Connector Pin Assignment for the AT-MIO-64E-3
  45. Figure 4-3. I/O Connector Pin Assignment for the AT-MIO-16DE-10
  46. I/O Connector Signal Descriptions
  47. Table 4-4. I/O Signal Summary, AT-MIO-16XE-50
  48. Analog Input Signal Connections
  49. Figure 4-4. AT E Series PGIA
  50. Types of Signal Sources
  51. Figure 4-5. Summary of Analog Input Connections
  52. Differential Connection Considerations (DIFF Input Configuration)
  53. Figure 4-6. Differential Input Connections for Ground-Referenced Signals
  54. Figure 4-7. Differential Input Connections for Nonreferenced Signals
  55. Single-Ended Connection Considerations
  56. Figure 4-8. Single-Ended Input Connections for Nonreferenced or Floating Signals
  57. Common-Mode Signal Rejection Considerations
  58. Analog Output Signal Connections
  59. Digital I/O Signal Connections
  60. Figure 4-11. Digital I/O Connections
  61. Power Connections
  62. Programmable Function Input Connections
  63. Data Acquisition Timing Connections
  64. SCANCLK Signal
  65. TRIG1 Signal
  66. Figure 4-17. TRIG1 Input Signal Timing
  67. TRIG2 Signal
  68. STARTSCAN Signal
  69. Figure 4-21. STARTSCAN Input Signal Timing
  70. CONVERT* Signal
  71. Figure 4-23. CONVERT* Input Signal Timing
  72. AIGATE Signal
  73. Waveform Generation Timing Connections
  74. UPDATE* Signal
  75. Figure 4-28. UPDATE* Input Signal Timing
  76. UISOURCE Signal
  77. General-Purpose Timing Signal Connections
  78. GPCTR0_GATE Signal
  79. GPCTR0_UP_DOWN Signal
  80. GPCTR1_GATE Signal
  81. GPCTR1_OUT Signal
  82. GPCTR1_UP_DOWN Signal
  83. FREQ_OUT Signal
  84. Timing Specifications for Digital I/O Ports A, B, and C
  85. Mode 1 Input Timing
  86. Mode 1 Output Timing
  87. Mode 2 Bidirectional Timing
  88. Field Wiring Considerations
  89. Loading Calibration Constants
  90. Self-Calibration
  91. Other Considerations
  92. specifications
  93. input characteristics
  94. Figure B-1. 68-Pin MIO Connector Pin Assignments
  95. Figure B-2. 68-Pin DIO Connector Pin Assignments
  96. Figure B-3. 68-Pin Extended Analog Input Connector Pin Assignments
  97. Figure B-4. 50-Pin MIO Connector Pin Assignments
  98. Figure B-5. 50-Pin DIO Connector Pin Assignments
  99. Figure B-6. 50-Pin Extended Analog Input Connector Pin Assignments
  100. general information
  101. installation and configuration
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