Acer TM7300 Series Service Manual

Contents

Acer TM7300 Series Service Manual Manual pdf 65 page image

2-8Service Guide2.2.4 Pin DescriptionsThis section provides a detailed description of each signal. The signals are arranged in functionalgroups according to their associated interface.The “#” symbol at the end of a signal name indicates that the active, or asserted state occurs whenthe signal is at a low voltage level. When “#” is not present after the signal name, the signal isasserted when at the high voltage level.The terms assertion and negation are used exclusively. This is done to avoid confusion whenworking with a mixture of “active low” and “active high” signal. The term assert, or assertionindicates that a signal is active, independent of whether that level is represented by a high or lowvoltage. The term negate, or negation indicates that a signal is inactive.Certain signals have different functions, depending on the configuration programmed in the PCIconfiguration space. The signal whose function is being described is in bold font. Some of thesignals are multiplexed with General Purpose Inputs and Outputs. The default configuration andcontrol bits for each are described in Table 1 and Table 2.Each output signal description includes the value of the signal During Reset, After Reset, andDuring POS.During Reset refers to when the PCIRST# signal is asserted. After Reset is immediately afternegation of PCIRST# and the signal may change value anytime thereafter. The term High-Z meanstri-stated. The term Undefined means the signal could be high, low, tri-stated, or in some in-between level. Some of the power management signals are reset with the RSMRST# input signal.The functionality of these signals during RSMRST# assertion is described in theSuspend/Resumeand Power Plane Control section.The I/O buffer types are shown below:BUFFER TYPE DESCRIPTIONI input only signalO totem pole outputI/O bi-direction, tri-state input/output pins/t/s sustained tri-stateOD open drainI/OD input/open drain output is a standard input buffer with an open drain outputV This is not a standard signal. It is a power supply pin.3.3V/2.5V Indicates the buffer is 3.3V or 2.5V only, depending on the voltage (3.3V or 2.5V)connected to VCCX pins.3.3V/5V Indicates that the output is 3.3V and input is 3.3V receiver with 5V tolerance.5V Indicates 3.3V receiver with 5V tolerance.All 3V output signals can drive 5V TTL inputs. Most of the 3V input signals are 5V tolerant. The 3Vinput signals which are powered via the RTC or Suspend power planes should not exceed theirpower supply voltage (see Power Planes chapter for additional information). The open drain (OD)CPU interface signals should be pulled up to the CPU interface signal voltage.