Caen V1724 Series Technical Information Manual
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Document type: Title: Revision date: Revision:User's Manual (MUT) Mod. V1724 8 Channel 14bit - 100MS/s Digitizer 06/11/2007 7NPO: Filename: Number of pages: Page:00103/05:V1724x.MUTx/07 V1724_REV7.DOC 63 132.4.4. Digital I/O connectorsFunction: N.16 programmable differential LVDS I/O signals, Zdiff_in= 110 Ohm. FourIndipendent signal group 0÷3, 4÷7, 8÷11, 12÷15, In / Out direction control; see also § 3.6.Mechanical specifications:3M-7634-5002- 34 pin Header Connector2.4.5. Optical LINK connectorMechanical specifications:LC type connector; to be used with Multimode 62.5/125μm cable with LC connectors onboth sides; not featured on Mod. V1724LCElectrical specifications:Optical link for data readout and slow control with transfer rate up to 80MB/s; daisychainable.2.5. Other front panel components2.5.1. DisplaysThe front panel hosts the following LEDs:Table 2.2 : Front panel LEDsName: Colour: Function:DTACK green VME read/write access to the boardCLK_IN green External clock enabled.NIM green Standard selection for CLK I/O (V1724LC Rev.0), TRG OUT, TRG IN, S IN.TTL green Standard selection for CLK I/O (V1724LC Rev.0), TRG OUT, TRG IN, S IN.LINK green/yellow Network present; Data transfer activityPLL _LOCK green The PLL is locked to the reference clockPLL _BYPS green The reference clock drives directly ADC clocks; the PLL circuit is switchedoff and the PLL_LOCK LED is turned off.RUN green RUN bit set (see § 4.19)TRG green Trigger acceptedDRDY green Event/data (depending on acquisition mode) are present in the Output BufferBUSY red All the buffers are fullOUT_LVDS green Signal group OUT direction enabled.2.6. Internal componentsSW2..5 “Base Address [31:16]”: Type: 4 rotary switchesFunction: Set the VME base address of the module.SW1 “CLOCK SOURCE” Type Dip SwitchFunction: Select clock source (External or Internal)JP2 “FW” Type: Jumper.Function: it allows to select whether the “Standard” orthe “Back up” firmware must be loaded at power on;(default position: STD). |
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