Dell External OEMR R910 Technical Manual

Also see for PowerEdge R910: Manual Update Update Hardware owner's manual Update

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Dell External OEMR R910 Technical Manual Manual pdf 39 page image

DellDell PowerEdge R910 Technical Guide 398.2 Slots/RisersR910 has 8 memory risers; each memory riser has 8 DIMM slots. So there are a total of 64 DIMMs. SeeSystem Memory in the Hardware Owner’s Manual for detailed information.8.3 Key Features of the R910 Memory SubsystemRegistered (RDIMM) ECC DDR3 technology Each channel carries 64 data and 8 ECC bits Support for up to 1TB of memory (with 64 16GB RDIMMs) Support for 1066 MHz single, dual, and quad rank DIMMs Support ODT (On Die Termination) Clock gating (CKE) to conserve power when DIMMs are not accessedo DIMMs enter a low power self-refresh mode I2C access to SPD EEPROM for access to RDIMM thermal sensors Single-Bit Error Correction SDDC (Single Device Data Correction — x4 or x8 devices) Support for Closed Loop Thermal Management on RDIMMs Multi-Bit Error Detection Support for Memory Mirroring in limited configurations Support for Memory (Rank) Sparing in limited configurations8.4 Memory Speed LimitationsThe memory frequency is determined by a variety of inputs: Speed of the DIMMs Speed supported by the CPU (note the DDR3 speed is 1/6 the frequency of the SMI link) BIOS can limit frequency to DDR3 800 based on user power savings configuration in the SETUPmenuThe PowerEdge R910 supports DDR3 1067 DIMMs. Some CPU SKU’s will have lower SMI link speedsresulting in slower DDR3 buses. The supported frequencies are as follows: SMI link speed at 4.8GT/sec => DDR3 800 SMI link speed of 5.86 GT/sec => DDR3 978 SMI link speed of 6.4 GT/sec => DDR3 10678.5 SparingFor Rank sparing, one rank on each lockstep Mill Brook pair will be reserved as a spare, and in theevent that another rank exceeds a threshold of correctable ECC errors, the ―failing‖ rank will becopied to the spare. Once that operation is complete, the failed rank will be disabled.