Dell PowerEdge 6350 Installation And Troubleshooting Manual

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Contents

Dell PowerEdge 6350 Installation And Troubleshooting Manual Manual pdf 64 page image

5-14 Dell PowerEdge 6350 Systems Installation and Troubleshooting Guideá You get a parity error (any error message that contains the wordparity) at anytime during operation. These errors are usually accompanied by a reference to anaddress—the location of the portion of memory where the error occurred—whichyou should record on a copy of the Diagnostics Checklist found in Chapter 12,“Getting Help.”á You receive the Memory ECC fault detected message from the Dell Open-Manage Hardware Instrumentation Package (HIP) server management application.Refer to the Dell OpenManage HIP online help and theHP OpenView NNM SE x.xWith Dell OpenManage HIP x.xUser’s Guide for information about the alertmessage.6\VWHP6HW7HVW*URXSThe subtests in the System Set Test group check the computer’s basic system boardcomponents and verify their related functions.6XEWHVWVThe subtests that constitute the System Set Test group and the computer functionsthey confirm follow:á CMOS Confidence TestChecks the NVRAM for accessibility and reliability of data storage by performinga data pattern check and verifying the uniqueness of memory addresses.á DMA Controller TestTests the direct memory access (DMA) controller and verifies the correct opera-tion of its page and channel registers by writing patterns to the registers.á Real-Time Clock TestConfirms the functionality and accuracy of the computer’s real-time clock (RTC).á System Timers TestChecks the timers used by the microprocessor for event counting, frequencygeneration, and other functions. Only the functions that can be activated by soft-ware are tested.á Interrupt Controller TestGenerates an interrupt on each interrupt request (IRQ) line to verify that devicesusing that line can communicate with the microprocessor and that the interruptcontrollers send the correct memory addresses to the microprocessor.á APIC TestTests that the procedure used to boot a multiprocessor system is able to properlyreceive interrupts from the input/output (I/O) Advanced Peripheral InterruptController (APIC).