5544332211D DC CB BA A14:Place R500 & R503 terminationclose to the last part in thedaisy chainFor default Bootstrap don't populate R810 to R813And Slut JP804 Pin 13 - 14 and Pin 17 - 1819:17:Open (Internal ROM on, and mapped to top 32K)Close (Internal ROM off-boot from ext ROM)18:13:NC DDR0 DDR9 DDR15 DDR16 DDR18Open/0 (External Oscillator on TCLK pin)Close/1 (XTAL and Internal Oscillator)NC15:00 = I2C to JTAG Bridge disabled01 = ICD_SDA on VGA1_SDA, ICD_SCL on VGA1_SCL10 = ICD_SDA on VGA0_SDA, ICD_SCL on VGA0-SCL11 = I2C to JTAG bridge disabled, 5 JTAG signals mappedto AVS PinsFor General Purpose use12:7:NC DDR7DDR10DDR11DDR12DDR8000 = 20-bit address, 8-bit EXT I/F001 = 24-bit address, 8-bit EXT I/F010 = 20-bit address, 16-bit EXT I/F011 = 24-bit address, 16-bit EXT I/F1XX = OCM disabled, externalparallel control bus (testbench)I2C to JTAG bridge address or General useFoot Print for a X16 FlashNC6:0:16:BOOTSTRAP HEADEROPEN=0SHUNTED=1NC R216 R217 R218 R219R220NC R221 R222 R225 R228ADDC4 5Wednesday, February 15, 2006TitleSize Document Number RevDate: Sheet ofOCMADDR2OCMDATA9 FSDATA[0..31]FSBKSEL0FSADDR7FSADDR2OCMADDR19FSDATA18/FSWEOCMDATA2FSDATA15FSADDR5OCMADDR5OCMDATA7OCMADDR10OCMDATA12FSDATA6FSADDR5FSADDR4FSDATA8FSDQS1FSADDR12FSCKEFSDATA19FSDATA9OCMADDR7FSDATA21OCMADDR13FSDQS0/RESETOCMADDR3FSADDR1OCMADDR4OCMADDR9OCMADDR21FSDATA0FSBKSEL1FSADDR11FSADDR10OCMDATA13/OCM_CSOCMADDR16FSADDR6FSDATA3OCMDATA4OCMADDR9FSDATA25FSDATA27/FSCASFSDATA17OCMADDR8/ROM_CSFSDATA30OCMDATA14FSDATA24FSADDR8FSDATA13FSDQS3OCMADDR17OCMDATA10FSDQS2FSADDR2OCMADDR13OCMDATA8FSADDR[0..12]/FSRASOCMADDR6OCMADDR3FSCLK-FSCLK-FSCLK-/OCM_RE/FSCS0FSDATA2OCMADDR14/BYTEFSADDR9FSDATA23OCMADDR18OCMDATA6FSADDR1FSDATA11/FSCASOCMDATA[0..15] FSVREFFSADDR0OCMADDR12/RESETFSADDR6FSDATA5OCMADDR15/OCM_WEFSADDR0FSCLK+FSADDR12FSCLK-FSDATA1OCMADDR5OCMADDR7OCMADDR0OCMADDR15FSADDR8FSDQM0/OCM_REFSADDR10FSADDR11FSDATA29OCMADDR1OCMDATA15FSDQS0OCMADDR19/FSRASFSDQM1OCMADDR12OCMDATA3OCMADDR[0..21]FSDATA14OCMADDR16FSDATA28FSDATA10OCMADDR20FSDATA26FSDQM2OCMADDR11OCMADDR2FSDATA31OCMADDR8OCMADDR10FSBKSEL1FSDATA22FSDATA4OCMADDR11/OCM_WEOCMADDR14FSADDR3FSDQS3FSDQM2FSADDR3OCMDATA0OCMADDR17FSCLK+FSCLK+FSADDR9FSDQM3/FSWEFSBKSEL0FSDATA7OCMADDR6OCMDATA1FSCKEOCMADDR18OCMDATA5FSDQM3OCMADDR1OCMDATA11FSADDR4FSDATA16FSADDR7FSDQS2FSDQM1OCMADDR4/FSCS0FSDQM0FSCLK+ FSDATA12FSDATA20OCMADDR0FSDQS1GNDGND+2.5V_DDR+2.5V_DDR+3.3V_I/OGND+2.5V_DDRGNDFlash_PowerFSVREFFSVREF+3.3V_I/OFSVREF+3.3V_I/OGNDGNDGNDFlash_PowerFSVREFGND+3.3V_I/O+2.5V_DDRGND+3.3V_I/OGND+3.3V_I/OGND+3.3V_I/OTP501R228 10KTP521R21810KTP541R21710KC23410 nFC250100 nFR229 10KC23210 nFU15HY5DU281622CT-4444524222321204729303132353637383940282627164653433915556149118332457810111354565759606263656125864344866521417192550414251CKECLKCSCASRASWENCDMA0A1A2A3A4A5A6A7A8A9A10/APBA0BA1NCCLKNCNCVDDQVDDQVDDQVDDQVDDQVREFVDDVDDVDDDQ0NCDQ1NCDQ2NCDQ3NCNCDQ4NCDQ5NCDQ6NCDQ7VSSQVSSQVSSQVSSQVSSVSSVSSVSSQNCNCNCNCNCA11A12DQSR21610KTP40R222 10KR20710KC24722 uF10 VU16HY5DU281622CT-4444524222321204729303132353637383940282627164653433915556149118332457810111354565759606263656125864344866521417192550414251CKECLKCSCASRASWENCDMA0A1A2A3A4A5A6A7A8A9A10/APBA0BA1NCCLKNCNCVDDQVDDQVDDQVDDQVDDQVREFVDDVDDVDDDQ0NCDQ1NCDQ2NCDQ3NCNCDQ4NCDQ5NCDQ6NCDQ7VSSQVSSQVSSQVSSQVSSVSSVSSVSSQNCNCNCNCNCA11A12DQSC23022 uF C237100 nFR2030RRN910K1 82 73 64 5R21410KC22922 uF10 VR20910KR223 10KR230280TP431TP461C233100 nF C238100 nFTP491C24510 nFC2512PFTP511TP531C23110 nFU29Am29LV160D123456781819202122232425454341393634323026281137271748444240383533312947121591013141646A15A14A13A12A11A10A9A8A7A6A5A4A3A2A1A0DQ15/A1DQ14DQ13DQ12DQ11DQ10DQ9DQ8CE#OE#WE#VCCVSSA17A16DQ7DQ6DQ5DQ4DQ3DQ2DQ1DQ0BYTE#RESET#Ready/Busy#A19A20NC/WP_ACCA18VSSR224 10KTP551TP411R231280R20510KJP1CON212R225 10KC35470uF6VR20610KR221 10KR20810KC246100 nFC236100 nFR226 10KC2522PFC23910 nFR21510KR2040RR22010KR227 10KC235100 nFTP421TP451R21910KTP481C249100 nFFSDQS[0..3]3OCMDATA[0..15]3OCMADDR[0..21]3FSADDR[0..12]3FSBKSEL03/OCM_WE3/FSCS03FSBKSEL13FSDATA[0..31]3FSCKE3FSCLK+3/ROM_CS3/FSCAS3/OCM_RE3/FSRAS3/FSCS03FSDQM[0..3]3/RESET3FSCLK-3/FSWE3