FUNCTIONAL DESCRIPTIONThe fundamental architecture of ispMACH 4A devices (Figure 1) consists of multiple, optimizedPAL ® blocks interconnected by a central switch matrix. The central switch matrix allowscommunication between PAL blocks and routes inputs to the PAL blocks. Together, the PALblocks and central switch matrix allow the logic designer to create large designs in a singledevice instead of having to use multiple devices.The key to being able to make effective use of these devices lies in the interconnect schemes.In the ispMACH 4A architecture, the macrocells are flexibly coupled to the product termsthrough the logic allocator, and the I/O pins are flexibly coupled to the macrocells due to theoutput switch matrix. In addition, more input routing options are provided by the input switchmatrix. These resources provide the flexibility needed to fit designs efficiently.Notes:1. 16 for ispMACH 4A devices with 1:1 macrocell-I/O cell ratio (see next page).2. Block clocks do not go to I/O cells in M4A(3,5)-32/32.3. M4A(3,5)-192, M4A(3,5)-256, M4A3-384, and M4A3-512 have dedicated clock pins which cannot be used as inputs and donot connect to the central switch matrix.I/OPinsClock/InputPinsCentral Switch MatrixI/OPinsI/OPinsDedicatedInput PinsPAL BlockPAL BlockLogicAllocatorwith XOROutput/BuriedMacrocells33/34/36 1616ClockGeneratorLogicArrayOutput Switch MatrixInputSwitchMatrixI/O Cells16168Note 1Note 2Note 34133DPR1001 harman/kardon