ESMT M12L64164AElite Semiconductor Memory Technology Inc. Publication Date: Mar. 2003Revision: 1.7 1/44SDRAM 1M x 16 Bit x 4 BanksSynchronous DRAMFEATURESy JEDEC standard 3.3V power supplyy LVTTL compatible with multiplexed addressy Four banks operationy MRS cycle with address key programs- CAS Latency (2 & 3)- Burst Length (1, 2, 4, 8 & full page)- Burst Type (Sequential & Interleave)y All inputs are sampled at the positive going edge of thesystem clocky DQM for maskingy Auto & self refreshy 64ms refresh period (4K cycle)ORDERING INFORMATION54 Pin TSOP (Type II)(400mi l x 875mil )PRODUCT NO. MAX FREQ. PACKAGEM12L64164A-6T 166MHzM12L64164A-7T 143MHzTSOP IIGENERAL DESCRIPTIONThe M12L64164A is 67,108,864 bits synchronous high data rate Dynamic RAMorganized as 4 x 1,048, 576 words by16 bits. S ynchronous desig n allo ws precis e c ycle co ntrols with the use of sy stem clo ck I/O transactions are poss ible o nevery clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the samedevice to be useful for a variety of high bandwidth, high performance memory system applications.PIN ASSIGNMENTTop View123456789101112131415161718192021222324252627V DDDQ 0V DD QDQ 1DQ 2V S S QDQ 3DQ 4V DD QDQ 5DQ 6V S S QDQ 7V DDL DQ MW EC ASR ASCSA 13A 12A 10 /APA 0A 1A 2A 3V DD545352515049484746454443424140393837363534333231302928V SSDQ15V S S QDQ14DQ13V DD QDQ12DQ11V S S QDQ10DQ 9V DD QDQ 8V S SN CU D Q MCLKCKEN CA 11A 9A 8A 7A 6A 5A 4V S Sharman/kardonDVD 26 and 28/230 Service ManualPage 51 of 76