Harris ZX2500 Technical Manual

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Harris ZX2500 Technical Manual Manual pdf 87 page image

12/20/11 888-2595-001 4-7WARNING: Disconnect primary power prior to servicing.Section 4 Theory of OperationZX Series4.5.4 Socket Interlock Module Fault SensorIn addition to the three fault conditions described above, a >3V PA current sample tocommand a PS module shutdown can also be generated via R1-Q1 whenever the PAmodule is unplugged and the connection to the ground of the base of Q1 via J5-V, J5-A,J6-V, J6-A is brokenThe PA backplane reports a module shutdown status to the controller board (via acomparator on the PS interface board) whenever the 50V from the PS module is notpresent. This sensing is done by transistors Q2 and Q3. A sample of the 50V passesthrough voltage divider R3-R4, causing Q2 to conduct and Q3 not to conduct. TheMODULE_OFF signal line at J7-9 is common among all backplanes and is configuredto report a shutdown alarm on the controller whenever it is grounded at any backplane(PA or IPA).4.6 IPA BackplaneConsult drawing 801-0203-581The IPA backplane is essentially the same as the PA backplane discussed earlier, butwith the noticeable difference that each half of the IPA module may be shut downindependently for greater redundancy. Accordingly, there is an independent set of threefault comparators for each half of the IPA module: U2-B,C,D and U3-B,C,D.The IPA module does not have its own corresponding PS module, but rather shares theoutput of all the PS modules from the other PA modules. Accordingly it is not possibleto shut down the PS module via a +3.5V current sample, as in the case of the PAbackplane. Instead, the +50V DC feed to each half of the IPA module may be shutdown independently via PMOS pass FETs Q5 and Q6. When FET Q2 (Q4) isconducting, the gate of Q5 (Q6) is pulled low via R74-R58-R59 (R75-R60-R61) andLED DS1 (DS2) is lit, indicating that +50V is being applied to the IPA module half inquestion. When Q2 (Q4) no longer conducts, the gate of Q5 (Q6) is pulled high,thereby causing Q5 (Q6) to enter a high impedance state and interrupting the flow of+50V power to the IPA module. Driver FET Q1 (Q3) provides a logic inversion suchthat a high output from the fault comparators at U2 (U3), provides a low input to thegate of Q2 (Q4).The same set of three LEDS (DS3, DS4, DS5) is used to signal a fault condition forboth halves of the IPA module. They are shared via steering diode network CR6Athrough CR6F. The status of LEDs DS1 and DS2 is usually sufficient to determine towhich half of the IPA module the fault applies (i.e. which LED is off).