WSB-9452 PICMG 1.0 CPU CardPage 161Î 533MHz Sets the DRAM frequency to 533MHzÎ 667MHz Sets the DRAM frequency to 667MHzÎ Configure DRAM Timing by SPD [Enabled]Use the Configure DRAM Timing by SPD option to determine if the system uses theSPD (Serial Presence Detect) EEPROM to configure the DRAM timing. The SPDEEPROM contains all necessary DIMM specifications including the speed of the individualcomponents such as CAS and bank cycle time as well as valid settings for the module andthe manufacturer's code. The SPD enables the BIOS to read the spec sheet of the DIMMson boot-up and then adjust the memory timing parameters accordingly.Î Disabled DRAM timing parameters are manually set using theDRAM sub-itemsÎ Enabled D EFAULT DRAM timing parameter are set according to theDRAM Serial Presence Detect (SPD)If the Configure DRAM Timing by SPD option is disabled, the following configurationoptions appear. DRAM CAS# Latency [5] DRAM RAS# to CAS# Delay [6 DRAM Clocks] DRAM RAS# Precharge [6 DRAM Clocks] DRAM RAS# Activate to Precha [15 DRAM Clocks]Î Memory Hole [Disabled]Use the Memory Hole option to reserve memory space between 15MB and 16MB for ISAexpansion cards that require a specified area of memory to work properly. If an older ISAexpansion card is used, please refer to the documentation that came with the card to see ifit is necessary to reserve the space.
