Icom IC-R7100 Service Manual

Also see for IC-R7100: Service manual Insrtuction manual Service manual

3·3 LOGIC CIRCUITS 3·3·4 BAND SELECTION DATA (LOGIC UN IThe LOGIC circuit consists ol a one ch ip a-bit CPU (ICS),an 1/0 expander (1C4 ) controlling the input level l rom tnekey matri x, a 84 k-bit CMOS RAM (ICll) and a CI·Y c ircuit.The 64 k·bi\ CM05 RAM (ICll) contains 900 memorychanne ls which can ba divid ed in to 9 ba nks an d 20 inde-pendent. progr am channels. The CI·V ci rcuit contro tsfrequency, mode , memory channels etc.. by conneclingthe rec eiver with an optional CT·17 CI·Y LEVEL CON·YERTER to a personal computer equipped w ith anRS·232C port.3·3·1 RESET CIRCU IT (LOGIC UNIT)The reset circuit resets the CPU (ICS), the LCD driv er s(1C8, IC9) and the 1/0 expander (1C4) when the three-term inal voltage regulator (IC13) dete ct s S V and outputsS Y. The leading edge voltage is applied to a time con-sta nt (R24, C22). The " LO W" pulse-type signal isoutput trom the time cons tant dur ing Ihe delay time .The sign al Is inverted at 06 and is Ihen applied to aSch mi tl t rigger c ircuit (IC7) to tu ne the pulse-type signaI.The rese t signal is applied to the reset ports ol the CPU(ICS) , the LCD dr iv er s (ICa, IC9) and the 1/0 expand er(1C4 ). 0 14 discharges the voltage of C22 .3·3·2 DIMMER CIRCUIT (LOGIC UNIT)The band control signaIs are changed depending on .receive treq uencies. The CPU (ICS) outpu ts the lollowsignals for the RF UNIT, PLL UNIT and MAIN UNIT.REC EIV E RF BAN D PLLFREQU ENCY CON VBl B2 B3 84 BH SS VS25.0000- H L L L L L H L89.9999 MHz90.0000- L H L L L L H L249.9999 MHz250 .0000- L L H L H L L L511.9999 MHz512.0000- L L L H L H H L761 .9999 MHz762.0000- L L L H H H L L1024.9999 MHz1025 .0000- H L L L L L H H1089.9999 MHz1090.0000- L H L L L L H H1249.9999 MHz1250 .0000- L L H L H L L H1511.9999 MHz1512 .0000- L L L H L H H H1761 .9999 MHz1762 .0000- L L L H H H L H1999.9999 MHzThs dimmer circuit cons ists of 02 . 03 and 0 16 and drivesba cklights (0 54 - 0 5 7), ensuring tnat brightness does notchange even w ith a change of pow er suppl y. When tne[DIM MER] swi tc h is ON, the CPU ( ICS, pin 56) outp ut s a" LOW " signal to decr ease the base voltage of 03 .• DIMMER CIRCUIT3·3·3 REGULATOR CIRCUIT (LOGIC UNIT)IC23 is a S Y th ree-terminal reg ulat or . The "LHV" lineis converted trom me "HV" li ne and pa ss es through aresi stor ( R29l) on the MAIN UNIT. Then, the voltageli ne is applied to IC23. The time const ant consists ofR29l on the MAIN UNIT and C7l on the LOGIC UNITand pro tsc ts Ihe 5 V line trom any drastic changes.3·3·S CPU (I CS) PORT ALLOCATJONS(LOGIC UNIT)PORT PO RT PIN DES CRIPTIONNUIoABER NAME NUIoABERPOO- B 'l -r- 14- 18 Ou tpu ts the ba nd con tr ol si gnalsP04 84 , BH for the RF UN IT. See the tablesh own In th e BAND SELECTlONDATA (3-3- 4) .P05 CONV 19 Output s a ban d cont rol signal fo rthe MAIN UNIT. See the tablashown in the BAND SELECTl ONDATA (3-3-4 ).POS. VS, SS 20 , 21 Outpu ts the ba nd c ontr ol signa ls ,P07 lor th e PLL U NIT . See th e tablashown in the BAND SELECTIONDATA (3 '3-4) .PlO DIM 56 Be comes ··LOW " when the(DIMM ER] switch is ON .Pl l SSTB 57 Out puts a strobe sig nal tor anoptiona l UT·36 VO IC ESYNTH ES IZE R UN IT .P12 PSTB SB Outpu ts a strobe signal lor a PLlIC (IC1 ) on the PL L UN IT.P13 EXSTB 59 Outputs a strot>e sig nal lor a DIAcontro l IC (IC14 ) on th e PLL UNI T.P14 REML 61 Output s an indicato r slg nal tor I hs(AEMOTE] indicator on the Ironlpanel. Th is pon becomes"HIGH" when the CPU enters 1heremale conditi on via the CINsystem .•DS 'DS 'FIg. 11" .( { ( '"'IJ I)RURU••f,•e • •• 0•• RuRu r ' J.J. R'""... ,...UC3l.. DO3- 12